Commit abd32008 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge branch 'drm-nouveau-next' of... 

Merge branch 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux-2.6 into drm-core-next

* 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux-2.6: (57 commits)
  drm/nouveau: map first page of mmio early and determine chipset earlier
  drm/nvd0/disp: disconnect encoders before reprogramming them
  drm/nvd0/disp: move syncs/magic setup to or mode_set
  drm/nouveau/dp: account for channel coding overhead in link training
  drm/nvd0/disp: fix dcb sor link matching in supervisor handler
  drm/nvd0/disp: initial implementation of displayport
  drm/nouveau/dp: make dp dpms function common, call from sor code instead
  drm/nv50/hwsq: some nv92 fixes
  drm/nouveau/dp: move all nv50/sor-specific code out of nouveau_dp.c
  drm/nouveau/dp: make functions for executing various bios tables
  drm/nouveau/pm: fix oops if chipset has no pm support at all
  drm/nouveau/bios: rework vbios shadowing
  drm/nouveau/bios: attempt acpi rom fetch before pcirom
  drm/nvd0/disp: attempt to handle more than 2 crtcs if possible
  drm/nvc0/vram: get part count from PUNITS
  drm/nv40/pm: fix fanspeed regression
  drm/nouveau/pm: several fixes for nvc0 memory timings
  drm/nvc0/pm: restrict pll mode to clocks that can actually use it
  drm/nouveau/dp: fix bad comparison in dp_link_train_commit()
  drm/nouveau/mxm: call mxmi to determine revision before calling mxms
  ...
parents 83465324 2f5394c3

drivers/gpu/drm/nouveau/Makefile

+2 −1
Original line number Diff line number Diff line
@@ -14,7 +14,8 @@ nouveau-y := nouveau_drv.o nouveau_state.o nouveau_channel.o nouveau_mem.o \ 
	     nouveau_mm.o nouveau_vm.o nouveau_mxm.o nouveau_gpio.o \

             nv04_timer.o \

             nv04_mc.o nv40_mc.o nv50_mc.o \

             nv04_fb.o nv10_fb.o nv30_fb.o nv40_fb.o nv50_fb.o nvc0_fb.o \

             nv04_fb.o nv10_fb.o nv20_fb.o nv30_fb.o nv40_fb.o \

             nv50_fb.o nvc0_fb.o \

             nv04_fifo.o nv10_fifo.o nv40_fifo.o nv50_fifo.o nvc0_fifo.o \

             nv04_graph.o nv10_graph.o nv20_graph.o \

             nv40_graph.o nv50_graph.o nvc0_graph.o \

drivers/gpu/drm/nouveau/nouveau_bios.c

+156 −119
Original line number Diff line number Diff line
@@ -65,195 +65,232 @@ static bool nv_cksum(const uint8_t *data, unsigned int length) 
}



static int

score_vbios(struct drm_device *dev, const uint8_t *data, const bool writeable)

score_vbios(struct nvbios *bios, const bool writeable)

{

	if (!(data[0] == 0x55 && data[1] == 0xAA)) {

		NV_TRACEWARN(dev, "... BIOS signature not found\n");

	if (!bios->data || bios->data[0] != 0x55 || bios->data[1] != 0xAA) {

		NV_TRACEWARN(bios->dev, "... BIOS signature not found\n");

		return 0;

	}



	if (nv_cksum(data, data[2] * 512)) {

		NV_TRACEWARN(dev, "... BIOS checksum invalid\n");

	if (nv_cksum(bios->data, bios->data[2] * 512)) {

		NV_TRACEWARN(bios->dev, "... BIOS checksum invalid\n");

		/* if a ro image is somewhat bad, it's probably all rubbish */

		return writeable ? 2 : 1;

	} else

		NV_TRACE(dev, "... appears to be valid\n");

	}



	NV_TRACE(bios->dev, "... appears to be valid\n");

	return 3;

}



static void load_vbios_prom(struct drm_device *dev, uint8_t *data)

static void

bios_shadow_prom(struct nvbios *bios)

{

	struct drm_device *dev = bios->dev;

	struct drm_nouveau_private *dev_priv = dev->dev_private;

	uint32_t pci_nv_20, save_pci_nv_20;

	int pcir_ptr;

	u32 pcireg, access;

	u16 pcir;

	int i;



	/* enable access to rom */

	if (dev_priv->card_type >= NV_50)

		pci_nv_20 = 0x88050;

		pcireg = 0x088050;

	else

		pci_nv_20 = NV_PBUS_PCI_NV_20;

		pcireg = NV_PBUS_PCI_NV_20;

	access = nv_mask(dev, pcireg, 0x00000001, 0x00000000);



	/* enable ROM access */

	save_pci_nv_20 = nvReadMC(dev, pci_nv_20);

	nvWriteMC(dev, pci_nv_20,

		  save_pci_nv_20 & ~NV_PBUS_PCI_NV_20_ROM_SHADOW_ENABLED);

	/* bail if no rom signature, with a workaround for a PROM reading

	 * issue on some chipsets.  the first read after a period of

	 * inactivity returns the wrong result, so retry the first header

	 * byte a few times before giving up as a workaround

	 */

	i = 16;

	do {

		if (nv_rd08(dev, NV_PROM_OFFSET + 0) == 0x55)

			break;

	} while (i--);



	/* bail if no rom signature */

	if (nv_rd08(dev, NV_PROM_OFFSET) != 0x55 ||

	    nv_rd08(dev, NV_PROM_OFFSET + 1) != 0xaa)

	if (!i || nv_rd08(dev, NV_PROM_OFFSET + 1) != 0xaa)

		goto out;



	/* additional check (see note below) - read PCI record header */

	pcir_ptr = nv_rd08(dev, NV_PROM_OFFSET + 0x18) |

	pcir = nv_rd08(dev, NV_PROM_OFFSET + 0x18) |

	       nv_rd08(dev, NV_PROM_OFFSET + 0x19) << 8;

	if (nv_rd08(dev, NV_PROM_OFFSET + pcir_ptr) != 'P' ||

	    nv_rd08(dev, NV_PROM_OFFSET + pcir_ptr + 1) != 'C' ||

	    nv_rd08(dev, NV_PROM_OFFSET + pcir_ptr + 2) != 'I' ||

	    nv_rd08(dev, NV_PROM_OFFSET + pcir_ptr + 3) != 'R')

	if (nv_rd08(dev, NV_PROM_OFFSET + pcir + 0) != 'P' ||

	    nv_rd08(dev, NV_PROM_OFFSET + pcir + 1) != 'C' ||

	    nv_rd08(dev, NV_PROM_OFFSET + pcir + 2) != 'I' ||

	    nv_rd08(dev, NV_PROM_OFFSET + pcir + 3) != 'R')

		goto out;



	/* on some 6600GT/6800LE prom reads are messed up.  nvclock alleges a

	 * a good read may be obtained by waiting or re-reading (cargocult: 5x)

	 * each byte.  we'll hope pramin has something usable instead

	 */

	for (i = 0; i < NV_PROM_SIZE; i++)

		data[i] = nv_rd08(dev, NV_PROM_OFFSET + i);

	/* read entire bios image to system memory */

	bios->length = nv_rd08(dev, NV_PROM_OFFSET + 2) * 512;

	bios->data = kmalloc(bios->length, GFP_KERNEL);

	if (bios->data) {

		for (i = 0; i < bios->length; i++)

			bios->data[i] = nv_rd08(dev, NV_PROM_OFFSET + i);

	}



out:

	/* disable ROM access */

	nvWriteMC(dev, pci_nv_20,

		  save_pci_nv_20 | NV_PBUS_PCI_NV_20_ROM_SHADOW_ENABLED);

	/* disable access to rom */

	nv_wr32(dev, pcireg, access);

}



static void load_vbios_pramin(struct drm_device *dev, uint8_t *data)

static void

bios_shadow_pramin(struct nvbios *bios)

{

	struct drm_device *dev = bios->dev;

	struct drm_nouveau_private *dev_priv = dev->dev_private;

	uint32_t old_bar0_pramin = 0;

	u32 bar0 = 0;

	int i;



	if (dev_priv->card_type >= NV_50) {

		u64 addr = (u64)(nv_rd32(dev, 0x619f04) & 0xffffff00) << 8;

		if (!addr) {

			addr  = (u64)nv_rd32(dev, 0x1700) << 16;

			addr  = (u64)nv_rd32(dev, 0x001700) << 16;

			addr += 0xf0000;

		}



		old_bar0_pramin = nv_rd32(dev, 0x1700);

		nv_wr32(dev, 0x1700, addr >> 16);

		bar0 = nv_mask(dev, 0x001700, 0xffffffff, addr >> 16);

	}



	/* bail if no rom signature */

	if (nv_rd08(dev, NV_PRAMIN_OFFSET) != 0x55 ||

	if (nv_rd08(dev, NV_PRAMIN_OFFSET + 0) != 0x55 ||

	    nv_rd08(dev, NV_PRAMIN_OFFSET + 1) != 0xaa)

		goto out;



	for (i = 0; i < NV_PROM_SIZE; i++)

		data[i] = nv_rd08(dev, NV_PRAMIN_OFFSET + i);

	bios->length = nv_rd08(dev, NV_PRAMIN_OFFSET + 2) * 512;

	bios->data = kmalloc(bios->length, GFP_KERNEL);

	if (bios->data) {

		for (i = 0; i < bios->length; i++)

			bios->data[i] = nv_rd08(dev, NV_PRAMIN_OFFSET + i);

	}



out:

	if (dev_priv->card_type >= NV_50)

		nv_wr32(dev, 0x1700, old_bar0_pramin);

		nv_wr32(dev, 0x001700, bar0);

}



static void load_vbios_pci(struct drm_device *dev, uint8_t *data)

static void

bios_shadow_pci(struct nvbios *bios)

{

	void __iomem *rom = NULL;

	size_t rom_len;

	int ret;

	struct pci_dev *pdev = bios->dev->pdev;

	size_t length;



	ret = pci_enable_rom(dev->pdev);

	if (ret)

		return;



	rom = pci_map_rom(dev->pdev, &rom_len);

	if (!rom)

		goto out;

	memcpy_fromio(data, rom, rom_len);

	pci_unmap_rom(dev->pdev, rom);

	if (!pci_enable_rom(pdev)) {

		void __iomem *rom = pci_map_rom(pdev, &length);

		if (rom) {

			bios->data = kmalloc(length, GFP_KERNEL);

			if (bios->data) {

				memcpy_fromio(bios->data, rom, length);

				bios->length = length;

			}

			pci_unmap_rom(pdev, rom);

		}



out:

	pci_disable_rom(dev->pdev);

		pci_disable_rom(pdev);

	}

}



static void load_vbios_acpi(struct drm_device *dev, uint8_t *data)

static void

bios_shadow_acpi(struct nvbios *bios)

{

	int i;

	int ret;

	int size = 64 * 1024;

	struct pci_dev *pdev = bios->dev->pdev;

	int ptr, len, ret;

	u8 data[3];



	if (!nouveau_acpi_rom_supported(dev->pdev))

	if (!nouveau_acpi_rom_supported(pdev))

		return;



	for (i = 0; i < (size / ROM_BIOS_PAGE); i++) {

		ret = nouveau_acpi_get_bios_chunk(data,

						  (i * ROM_BIOS_PAGE),

						  ROM_BIOS_PAGE);

		if (ret <= 0)

			break;

	}

	ret = nouveau_acpi_get_bios_chunk(data, 0, sizeof(data));

	if (ret != sizeof(data))

		return;



	bios->length = min(data[2] * 512, 65536);

	bios->data = kmalloc(bios->length, GFP_KERNEL);

	if (!bios->data)

		return;



	len = bios->length;

	ptr = 0;

	while (len) {

		int size = (len > ROM_BIOS_PAGE) ? ROM_BIOS_PAGE : len;



		ret = nouveau_acpi_get_bios_chunk(bios->data, ptr, size);

		if (ret != size) {

			kfree(bios->data);

			bios->data = NULL;

			return;

		}



		len -= size;

		ptr += size;

	}

}



struct methods {

	const char desc[8];

	void (*loadbios)(struct drm_device *, uint8_t *);

	void (*shadow)(struct nvbios *);

	const bool rw;

	int score;

	u32 size;

	u8 *data;

};



static struct methods shadow_methods[] = {

	{ "PRAMIN", load_vbios_pramin, true },

	{ "PROM", load_vbios_prom, false },

	{ "PCIROM", load_vbios_pci, true },

	{ "ACPI", load_vbios_acpi, true },

};

#define NUM_SHADOW_METHODS ARRAY_SIZE(shadow_methods)



static bool NVShadowVBIOS(struct drm_device *dev, uint8_t *data)

static bool

bios_shadow(struct drm_device *dev)

{

	struct methods *methods = shadow_methods;

	int testscore = 3;

	int scores[NUM_SHADOW_METHODS], i;

	struct methods shadow_methods[] = {

		{ "PRAMIN", bios_shadow_pramin, true, 0, 0, NULL },

		{ "PROM", bios_shadow_prom, false, 0, 0, NULL },

		{ "ACPI", bios_shadow_acpi, true, 0, 0, NULL },

		{ "PCIROM", bios_shadow_pci, true, 0, 0, NULL },

		{}

	};

	struct drm_nouveau_private *dev_priv = dev->dev_private;

	struct nvbios *bios = &dev_priv->vbios;

	struct methods *mthd, *best;



	if (nouveau_vbios) {

		for (i = 0; i < NUM_SHADOW_METHODS; i++)

			if (!strcasecmp(nouveau_vbios, methods[i].desc))

				break;



		if (i < NUM_SHADOW_METHODS) {

			NV_INFO(dev, "Attempting to use BIOS image from %s\n",

				methods[i].desc);

		mthd = shadow_methods;

		do {

			if (strcasecmp(nouveau_vbios, mthd->desc))

				continue;

			NV_INFO(dev, "VBIOS source: %s\n", mthd->desc);



			methods[i].loadbios(dev, data);

			if (score_vbios(dev, data, methods[i].rw))

			mthd->shadow(bios);

			mthd->score = score_vbios(bios, mthd->rw);

			if (mthd->score)

				return true;

		}

		} while ((++mthd)->shadow);



		NV_ERROR(dev, "VBIOS source \'%s\' invalid\n", nouveau_vbios);

	}



	for (i = 0; i < NUM_SHADOW_METHODS; i++) {

		NV_TRACE(dev, "Attempting to load BIOS image from %s\n",

			 methods[i].desc);

		data[0] = data[1] = 0;	/* avoid reuse of previous image */

		methods[i].loadbios(dev, data);

		scores[i] = score_vbios(dev, data, methods[i].rw);

		if (scores[i] == testscore)

			return true;

	mthd = shadow_methods;

	do {

		NV_TRACE(dev, "Checking %s for VBIOS\n", mthd->desc);

		mthd->shadow(bios);

		mthd->score = score_vbios(bios, mthd->rw);

		mthd->size = bios->length;

		mthd->data = bios->data;

	} while (mthd->score != 3 && (++mthd)->shadow);



	mthd = shadow_methods;

	best = mthd;

	do {

		if (mthd->score > best->score) {

			kfree(best->data);

			best = mthd;

		}

	} while ((++mthd)->shadow);



	while (--testscore > 0) {

		for (i = 0; i < NUM_SHADOW_METHODS; i++) {

			if (scores[i] == testscore) {

				NV_TRACE(dev, "Using BIOS image from %s\n",

					 methods[i].desc);

				methods[i].loadbios(dev, data);

	if (best->score) {

		NV_TRACE(dev, "Using VBIOS from %s\n", best->desc);

		bios->length = best->size;

		bios->data = best->data;

		return true;

	}

		}

	}



	NV_ERROR(dev, "No valid BIOS image found\n");

	NV_ERROR(dev, "No valid VBIOS image found\n");

	return false;

}
@@ -6334,11 +6371,7 @@ static bool NVInitVBIOS(struct drm_device *dev) 
	spin_lock_init(&bios->lock);

	bios->dev = dev;



	if (!NVShadowVBIOS(dev, bios->data))

		return false;



	bios->length = NV_PROM_SIZE;

	return true;

	return bios_shadow(dev);

}



static int nouveau_parse_vbios_struct(struct drm_device *dev)
@@ -6498,6 +6531,10 @@ nouveau_bios_init(struct drm_device *dev) 
void

nouveau_bios_takedown(struct drm_device *dev)

{

	struct drm_nouveau_private *dev_priv = dev->dev_private;



	nouveau_mxm_fini(dev);

	nouveau_i2c_fini(dev);



	kfree(dev_priv->vbios.data);

}

drivers/gpu/drm/nouveau/nouveau_bios.h

+4 −2
Original line number Diff line number Diff line
@@ -75,6 +75,8 @@ enum dcb_connector_type { 
	DCB_CONNECTOR_eDP = 0x47,

	DCB_CONNECTOR_HDMI_0 = 0x60,

	DCB_CONNECTOR_HDMI_1 = 0x61,

	DCB_CONNECTOR_DMS59_DP0 = 0x64,

	DCB_CONNECTOR_DMS59_DP1 = 0x65,

	DCB_CONNECTOR_NONE = 0xff

};
@@ -209,6 +211,8 @@ struct nvbios { 
		NVBIOS_BIT

	} type;

	uint16_t offset;

	uint32_t length;

	uint8_t *data;



	uint8_t chip_version;
@@ -219,8 +223,6 @@ struct nvbios { 


	spinlock_t lock;



	uint8_t data[NV_PROM_SIZE];

	unsigned int length;

	bool execute;



	uint8_t major_version;

drivers/gpu/drm/nouveau/nouveau_connector.c

+28 −1
Original line number Diff line number Diff line
@@ -519,6 +519,19 @@ nouveau_connector_set_property(struct drm_connector *connector, 
		return nv_crtc->set_dither(nv_crtc, true);

	}



	if (nv_crtc && nv_crtc->set_color_vibrance) {

		/* Hue */

		if (property == disp->vibrant_hue_property) {

			nv_crtc->vibrant_hue = value - 90;

			return nv_crtc->set_color_vibrance(nv_crtc, true);

		}

		/* Saturation */

		if (property == disp->color_vibrance_property) {

			nv_crtc->color_vibrance = value - 100;

			return nv_crtc->set_color_vibrance(nv_crtc, true);

		}

	}



	if (nv_encoder && nv_encoder->dcb->type == OUTPUT_TV)

		return get_slave_funcs(encoder)->set_property(

			encoder, connector, property, value);
@@ -858,6 +871,8 @@ drm_conntype_from_dcb(enum dcb_connector_type dcb) 
	case DCB_CONNECTOR_DVI_D    : return DRM_MODE_CONNECTOR_DVID;

	case DCB_CONNECTOR_LVDS     :

	case DCB_CONNECTOR_LVDS_SPWG: return DRM_MODE_CONNECTOR_LVDS;

	case DCB_CONNECTOR_DMS59_DP0:

	case DCB_CONNECTOR_DMS59_DP1:

	case DCB_CONNECTOR_DP       : return DRM_MODE_CONNECTOR_DisplayPort;

	case DCB_CONNECTOR_eDP      : return DRM_MODE_CONNECTOR_eDP;

	case DCB_CONNECTOR_HDMI_0   :
@@ -1002,7 +1017,9 @@ nouveau_connector_create(struct drm_device *dev, int index) 
	     nv_connector->type == DCB_CONNECTOR_DVI_I ||

	     nv_connector->type == DCB_CONNECTOR_HDMI_0 ||

	     nv_connector->type == DCB_CONNECTOR_HDMI_1 ||

	     nv_connector->type == DCB_CONNECTOR_DP)) {

	     nv_connector->type == DCB_CONNECTOR_DP ||

	     nv_connector->type == DCB_CONNECTOR_DMS59_DP0 ||

	     nv_connector->type == DCB_CONNECTOR_DMS59_DP1)) {

		drm_connector_attach_property(connector,

					      disp->underscan_property,

					      UNDERSCAN_OFF);
@@ -1014,6 +1031,16 @@ nouveau_connector_create(struct drm_device *dev, int index) 
					      0);

	}



	/* Add hue and saturation options */

	if (disp->vibrant_hue_property)

		drm_connector_attach_property(connector,

					      disp->vibrant_hue_property,

					      90);

	if (disp->color_vibrance_property)

		drm_connector_attach_property(connector,

					      disp->color_vibrance_property,

					      150);



	switch (nv_connector->type) {

	case DCB_CONNECTOR_VGA:

		if (dev_priv->card_type >= NV_50) {

drivers/gpu/drm/nouveau/nouveau_crtc.h

+3 −0
Original line number Diff line number Diff line
@@ -35,6 +35,8 @@ struct nouveau_crtc { 
	uint32_t dpms_saved_fp_control;

	uint32_t fp_users;

	int saturation;

	int color_vibrance;

	int vibrant_hue;

	int sharpness;

	int last_dpms;
@@ -67,6 +69,7 @@ struct nouveau_crtc { 


	int (*set_dither)(struct nouveau_crtc *crtc, bool update);

	int (*set_scale)(struct nouveau_crtc *crtc, bool update);

	int (*set_color_vibrance)(struct nouveau_crtc *crtc, bool update);

};



static inline struct nouveau_crtc *nouveau_crtc(struct drm_crtc *crtc)

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