Commit ab964000 authored by Matthias Kaehlcke's avatar Matthias Kaehlcke Committed by Heiko Stuebner
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ARM: dts: rockchip: move rk3288-veryon display settings into a separate file 



The chromebook .dtsi file contains common settings for veyron
Chromebooks with eDP displays. Some veyron devices with a display
aren't Chromebooks (e.g. 'tiger' aka 'AOpen Chromebase Mini'), move
display related bits from the chromebook .dtsi into a separate file
to avoid redundant DT settings.

The new file is included from the chromebook .dtsi and can be
included by non-Chromebook devices with a display.

Signed-off-by: default avatarMatthias Kaehlcke <mka@chromium.org>
Reviewed-by: default avatarDouglas Anderson <dianders@chromium.org>
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent 31ed9d9d

arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi

+1 −114
Original line number Diff line number Diff line
@@ -10,6 +10,7 @@ 
#include <dt-bindings/input/input.h>

#include "rk3288-veyron.dtsi"

#include "rk3288-veyron-analog-audio.dtsi"

#include "rk3288-veyron-edp.dtsi"

#include "rk3288-veyron-sdmmc.dtsi"



/ {
@@ -18,50 +19,6 @@ 
		i2c20 = &i2c_tunnel;

	};



	backlight: backlight {

		compatible = "pwm-backlight";

		brightness-levels = <

			  0   1   2   3   4   5   6   7

			  8   9  10  11  12  13  14  15

			 16  17  18  19  20  21  22  23

			 24  25  26  27  28  29  30  31

			 32  33  34  35  36  37  38  39

			 40  41  42  43  44  45  46  47

			 48  49  50  51  52  53  54  55

			 56  57  58  59  60  61  62  63

			 64  65  66  67  68  69  70  71

			 72  73  74  75  76  77  78  79

			 80  81  82  83  84  85  86  87

			 88  89  90  91  92  93  94  95

			 96  97  98  99 100 101 102 103

			104 105 106 107 108 109 110 111

			112 113 114 115 116 117 118 119

			120 121 122 123 124 125 126 127

			128 129 130 131 132 133 134 135

			136 137 138 139 140 141 142 143

			144 145 146 147 148 149 150 151

			152 153 154 155 156 157 158 159

			160 161 162 163 164 165 166 167

			168 169 170 171 172 173 174 175

			176 177 178 179 180 181 182 183

			184 185 186 187 188 189 190 191

			192 193 194 195 196 197 198 199

			200 201 202 203 204 205 206 207

			208 209 210 211 212 213 214 215

			216 217 218 219 220 221 222 223

			224 225 226 227 228 229 230 231

			232 233 234 235 236 237 238 239

			240 241 242 243 244 245 246 247

			248 249 250 251 252 253 254 255>;

		default-brightness-level = <128>;

		enable-gpios = <&gpio7 RK_PA2 GPIO_ACTIVE_HIGH>;

		pinctrl-names = "default";

		pinctrl-0 = <&bl_en>;

		pwms = <&pwm0 0 1000000 0>;

		post-pwm-on-delay-ms = <10>;

		pwm-off-delay-ms = <10>;

	};



	gpio-charger {

		compatible = "gpio-charger";

		charger-type = "mains";
@@ -85,35 +42,6 @@ 
		};

	};



	panel: panel {

		compatible ="innolux,n116bge", "simple-panel";

		status = "okay";

		power-supply = <&vcc33_lcd>;

		backlight = <&backlight>;



		panel-timing {

			clock-frequency = <74250000>;

			hactive = <1366>;

			hfront-porch = <136>;

			hback-porch = <60>;

			hsync-len = <30>;

			hsync-active = <0>;

			vactive = <768>;

			vfront-porch = <8>;

			vback-porch = <12>;

			vsync-len = <12>;

			vsync-active = <0>;

		};



		ports {

			panel_in: port {

				panel_in_edp: endpoint {

					remote-endpoint = <&edp_out_panel>;

				};

			};

		};

	};



	/* A non-regulated voltage from power supply or battery */

	vccsys: vccsys {

		compatible = "regulator-fixed";
@@ -155,33 +83,6 @@ 
	};

};



&edp {

	status = "okay";



	pinctrl-names = "default";

	pinctrl-0 = <&edp_hpd>;



	ports {

		edp_out: port@1 {

			reg = <1>;

			#address-cells = <1>;

			#size-cells = <0>;

			edp_out_panel: endpoint@0 {

				reg = <0>;

				remote-endpoint = <&panel_in_edp>;

			};

		};

	};

};



&edp_phy {

	status = "okay";

};



&pwm0 {

	status = "okay";

};



&rk808 {

	vcc11-supply = <&vcc_5v>;
@@ -234,14 +135,6 @@ 
	};

};



&vopl {

	status = "okay";

};



&vopl_mmu {

	status = "okay";

};



&pinctrl {

	pinctrl-0 = <

		/* Common for sleep and wake, but no owners */
@@ -264,12 +157,6 @@ 
		&bt_dev_wake_sleep

	>;



	backlight {

		bl_en: bl-en {

			rockchip,pins = <7 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;

		};

	};



	buttons {

		ap_lid_int_l: ap-lid-int-l {

			rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;

arch/arm/boot/dts/rk3288-veyron-edp.dtsi

0 → 100644
+124 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)

/*

 * Google Veyron (and derivatives) fragment for the edp displays

 *

 * Copyright 2019 Google LLC

 */



/ {

	backlight: backlight {

		compatible = "pwm-backlight";

		brightness-levels = <

			  0   1   2   3   4   5   6   7

			  8   9  10  11  12  13  14  15

			 16  17  18  19  20  21  22  23

			 24  25  26  27  28  29  30  31

			 32  33  34  35  36  37  38  39

			 40  41  42  43  44  45  46  47

			 48  49  50  51  52  53  54  55

			 56  57  58  59  60  61  62  63

			 64  65  66  67  68  69  70  71

			 72  73  74  75  76  77  78  79

			 80  81  82  83  84  85  86  87

			 88  89  90  91  92  93  94  95

			 96  97  98  99 100 101 102 103

			104 105 106 107 108 109 110 111

			112 113 114 115 116 117 118 119

			120 121 122 123 124 125 126 127

			128 129 130 131 132 133 134 135

			136 137 138 139 140 141 142 143

			144 145 146 147 148 149 150 151

			152 153 154 155 156 157 158 159

			160 161 162 163 164 165 166 167

			168 169 170 171 172 173 174 175

			176 177 178 179 180 181 182 183

			184 185 186 187 188 189 190 191

			192 193 194 195 196 197 198 199

			200 201 202 203 204 205 206 207

			208 209 210 211 212 213 214 215

			216 217 218 219 220 221 222 223

			224 225 226 227 228 229 230 231

			232 233 234 235 236 237 238 239

			240 241 242 243 244 245 246 247

			248 249 250 251 252 253 254 255>;

		default-brightness-level = <128>;

		enable-gpios = <&gpio7 RK_PA2 GPIO_ACTIVE_HIGH>;

		pinctrl-names = "default";

		pinctrl-0 = <&bl_en>;

		pwms = <&pwm0 0 1000000 0>;

		post-pwm-on-delay-ms = <10>;

		pwm-off-delay-ms = <10>;

	};



	panel: panel {

		compatible ="innolux,n116bge", "simple-panel";

		status = "okay";

		power-supply = <&vcc33_lcd>;

		backlight = <&backlight>;



		panel-timing {

			clock-frequency = <74250000>;

			hactive = <1366>;

			hfront-porch = <136>;

			hback-porch = <60>;

			hsync-len = <30>;

			hsync-active = <0>;

			vactive = <768>;

			vfront-porch = <8>;

			vback-porch = <12>;

			vsync-len = <12>;

			vsync-active = <0>;

		};



		ports {

			panel_in: port {

				panel_in_edp: endpoint {

					remote-endpoint = <&edp_out_panel>;

				};

			};

		};

	};

};



&edp {

	status = "okay";



	pinctrl-names = "default";

	pinctrl-0 = <&edp_hpd>;



	ports {

		edp_out: port@1 {

			reg = <1>;

			#address-cells = <1>;

			#size-cells = <0>;

			edp_out_panel: endpoint@0 {

				reg = <0>;

				remote-endpoint = <&panel_in_edp>;

			};

		};

	};

};



&edp_phy {

	status = "okay";

};



&pwm0 {

	status = "okay";

};



&vopl {

	status = "okay";

};



&vopl_mmu {

	status = "okay";

};



&pinctrl {

	backlight {

		bl_en: bl-en {

			rockchip,pins = <7 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;

		};

	};

};

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