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Move to/from Control Registers chapter of Intel SDM says. "Reserved bits in CR0 remain clear after any load of those registers; attempts to set them have no impact". Control Register chapter says "Bits 63:32 of CR0 are reserved and must be written with zeros. Writing a nonzero value to any of the upper 32 bits results in a general-protection exception, #GP(0)." This patch tries to implement this twisted logic. Signed-off-by:Gleb Natapov <gleb@redhat.com> Reported-by:
Lorenzo Martignoni <martignlo@gmail.com> Signed-off-by:
Marcelo Tosatti <mtosatti@redhat.com>
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