Unverified Commit aad15bc8 authored Feb 21, 2020 by Vincent Chen Committed by Palmer Dabbelt Mar 03, 2020

riscv: Change code model of module to medany to improve data accessing

All the loaded module locates in the region [＆_end-2G，VMALLOC_END] at
runtime, so the distance from the module start to the end of the kernel
image does not exceed 2GB. Hence, the code model of the kernel module can
be changed to medany to improve the performance data access.

Signed-off-by: Vincent Chen <vincent.chen@sifive.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>

parent 0cff8bff

arch/riscv/Makefile

+4 −2

Original line number	Diff line number	Diff line
		@@ -13,8 +13,10 @@ LDFLAGS_vmlinux :=
		ifeq ($(CONFIG_DYNAMIC_FTRACE),y)
		LDFLAGS_vmlinux := --no-relax
		endif
		KBUILD_AFLAGS_MODULE += -fPIC
		KBUILD_CFLAGS_MODULE += -fPIC

		ifeq ($(CONFIG_64BIT)$(CONFIG_CMODEL_MEDLOW),yy)
		KBUILD_CFLAGS_MODULE += -mcmodel=medany
		endif

		export BITS
		ifeq ($(CONFIG_ARCH_RV64I),y)

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