ARM: kvm: replace open coded VA->PA calculations with adr_l call (aaac3733) · Commits · 戴 / test

arch/arm/boot/compressed/head.S

+2 −13

Original line number	Diff line number	Diff line
		@@ -468,15 +468,10 @@ dtb_check_done:

		/*
		* Compute the address of the hyp vectors after relocation.
		* This requires some arithmetic since we cannot directly
		* reference __hyp_stub_vectors in a PC-relative way.
		* Call __hyp_set_vectors with the new address so that we
		* can HVC again after the copy.
		*/
		0: adr r0, 0b
		movw r1, #:lower16:__hyp_stub_vectors - 0b
		movt r1, #:upper16:__hyp_stub_vectors - 0b
		add r0, r0, r1
		adr_l r0, __hyp_stub_vectors
		sub r0, r0, r5
		add r0, r0, r10
		bl __hyp_set_vectors
		@@ -627,17 +622,11 @@ not_relocated: mov r0, #0
		cmp r0, #HYP_MODE @ if not booted in HYP mode...
		bne __enter_kernel @ boot kernel directly

		adr r12, .L__hyp_reentry_vectors_offset
		ldr r0, [r12]
		add r0, r0, r12

		adr_l r0, __hyp_reentry_vectors
		bl __hyp_set_vectors
		__HVC(0) @ otherwise bounce to hyp mode

		b . @ should never be reached

		.align 2
		.L__hyp_reentry_vectors_offset: .long __hyp_reentry_vectors - .
		#else
		b __enter_kernel
		#endif

arch/arm/kernel/hyp-stub.S

+12 −15

Original line number	Diff line number	Diff line
		@@ -24,41 +24,38 @@ ENTRY(__boot_cpu_mode)
		.text

		/*
		* Save the primary CPU boot mode. Requires 3 scratch registers.
		* Save the primary CPU boot mode. Requires 2 scratch registers.
		*/
		.macro store_primary_cpu_mode reg1, reg2, reg3
		.macro store_primary_cpu_mode reg1, reg2
		mrs \reg1, cpsr
		and \reg1, \reg1, #MODE_MASK
		adr \reg2, .L__boot_cpu_mode_offset
		ldr \reg3, [\reg2]
		str \reg1, [\reg2, \reg3]
		str_l \reg1, __boot_cpu_mode, \reg2
		.endm

		/*
		* Compare the current mode with the one saved on the primary CPU.
		* If they don't match, record that fact. The Z bit indicates
		* if there's a match or not.
		* Requires 3 additionnal scratch registers.
		* Requires 2 additional scratch registers.
		*/
		.macro compare_cpu_mode_with_primary mode, reg1, reg2, reg3
		adr \reg2, .L__boot_cpu_mode_offset
		ldr \reg3, [\reg2]
		ldr \reg1, [\reg2, \reg3]
		.macro compare_cpu_mode_with_primary mode, reg1, reg2
		adr_l \reg2, __boot_cpu_mode
		ldr \reg1, [\reg2]
		cmp \mode, \reg1 @ matches primary CPU boot mode?
		orrne \reg1, \reg1, #BOOT_CPU_MODE_MISMATCH
		strne \reg1, [\reg2, \reg3] @ record what happened and give up
		strne \reg1, [\reg2] @ record what happened and give up
		.endm

		#else /* ZIMAGE */

		.macro store_primary_cpu_mode reg1:req, reg2:req, reg3:req
		.macro store_primary_cpu_mode reg1:req, reg2:req
		.endm

		/*
		* The zImage loader only runs on one CPU, so we don't bother with mult-CPU
		* consistency checking:
		*/
		.macro compare_cpu_mode_with_primary mode, reg1, reg2, reg3
		.macro compare_cpu_mode_with_primary mode, reg1, reg2
		cmp \mode, \mode
		.endm

		@@ -73,7 +70,7 @@ ENTRY(__boot_cpu_mode)
		*/
		@ Call this from the primary CPU
		ENTRY(__hyp_stub_install)
		store_primary_cpu_mode r4, r5, r6
		store_primary_cpu_mode r4, r5
		ENDPROC(__hyp_stub_install)

		@ fall through...
		@@ -87,7 +84,7 @@ ENTRY(__hyp_stub_install_secondary)
		* If the secondary has booted with a different mode, give up
		* immediately.
		*/
		compare_cpu_mode_with_primary r4, r5, r6, r7
		compare_cpu_mode_with_primary r4, r5, r6
		retne lr

		/*

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