Commit aa9c4abe authored by Nikola Cornij's avatar Nikola Cornij Committed by Alex Deucher
Browse files

drm/amd/display: Refactor FPGA-specific link setup 



FPGA doesn't program backend, so we don't need certain link settings
(audio stream for example).

Signed-off-by: default avatarNikola Cornij <nikola.cornij@amd.com>
Reviewed-by: default avatarTony Cheng <Tony.Cheng@amd.com>
Acked-by: default avatarBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 19a86c08

drivers/gpu/drm/amd/display/dc/core/dc_link.c

+30 −26
Original line number Diff line number Diff line
@@ -2559,6 +2559,7 @@ void core_link_enable_stream( 
			pipe_ctx->stream_res.stream_enc,

			&stream->timing);



	if (!IS_FPGA_MAXIMUS_DC(core_dc->ctx->dce_environment)) {

		resource_build_info_frame(pipe_ctx);

		core_dc->hwss.update_info_frame(pipe_ctx);
@@ -2607,6 +2608,9 @@ void core_link_enable_stream( 


		core_dc->hwss.unblank_stream(pipe_ctx,

			&pipe_ctx->stream->sink->link->cur_link_settings);



	}



}



void core_link_disable_stream(struct pipe_ctx *pipe_ctx, int option)

drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

+1 −14
Original line number Diff line number Diff line
@@ -1377,26 +1377,13 @@ static enum dc_status apply_single_controller_ctx_to_hw( 
	/*  */

	dc->hwss.enable_stream_timing(pipe_ctx, context, dc);



	/* FPGA does not program backend */

	if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) {

		pipe_ctx->stream_res.opp->funcs->opp_set_dyn_expansion(

		pipe_ctx->stream_res.opp,

		COLOR_SPACE_YCBCR601,

		stream->timing.display_color_depth,

		pipe_ctx->stream->signal);



		pipe_ctx->stream_res.opp->funcs->opp_program_fmt(

			pipe_ctx->stream_res.opp,

			&stream->bit_depth_params,

			&stream->clamping);

		return DC_OK;

	}

	/* TODO: move to stream encoder */

	if (pipe_ctx->stream->signal != SIGNAL_TYPE_VIRTUAL)

		if (DC_OK != bios_parser_crtc_source_select(pipe_ctx)) {

			BREAK_TO_DEBUGGER();

			return DC_ERROR_UNEXPECTED;

		}



	pipe_ctx->stream_res.opp->funcs->opp_set_dyn_expansion(

			pipe_ctx->stream_res.opp,

			COLOR_SPACE_YCBCR601,

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

+1 −0
Original line number Diff line number Diff line
@@ -44,6 +44,7 @@ 
#include "dcn10_hubp.h"

#include "dcn10_hubbub.h"

#include "dcn10_cm_common.h"

#include "dc_link_dp.h"



#define DC_LOGGER_INIT(logger)

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