Commit aa919167 authored by Bhawanpreet Lakha's avatar Bhawanpreet Lakha Committed by Alex Deucher
Browse files

drm/amd/display: add dcn21 core DC changes



Add missing parameters, to make dcn21 compile
without errors

Acked-by: default avatarHarry Wentland <harry.wentland@amd.com>
Signed-off-by: default avatarBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent dd44a633
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+3 −0
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@@ -385,6 +385,9 @@ struct dc_debug_options {
	struct dc_bw_validation_profile bw_val_profile;
#ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT
	bool disable_fec;
#endif
#ifdef CONFIG_DRM_AMD_DC_DCN2_1
	bool disable_48mhz_pwrdwn;
#endif
	/* This forces a hard min on the DCFCLK requested to SMU/PP
	 * watermarks are not affected.
+3 −0
Original line number Diff line number Diff line
@@ -87,6 +87,9 @@ void core_link_set_avmute(struct pipe_ctx *pipe_ctx, bool enable);
struct resource_pool;
struct dc_state;
struct resource_context;
#if defined(CONFIG_DRM_AMD_DC_DCN2_1)
struct clk_bw_params;
#endif

struct resource_funcs {
	void (*destroy)(struct resource_pool **pool);
+4 −0
Original line number Diff line number Diff line
@@ -40,6 +40,10 @@ struct cstate_pstate_watermarks_st {
struct dcn_watermarks {
	uint32_t pte_meta_urgent_ns;
	uint32_t urgent_ns;
#if defined(CONFIG_DRM_AMD_DC_DCN2_1)
	uint32_t frac_urg_bw_nom;
	uint32_t frac_urg_bw_flip;
#endif
	struct cstate_pstate_watermarks_st cstate_pstate;
};

+1 −0
Original line number Diff line number Diff line
@@ -48,6 +48,7 @@ struct dce_hwseq_wa {
	bool DEGVIDCN10_253;
	bool false_optc_underflow;
	bool DEGVIDCN10_254;
	bool DEGVIDCN21;
};

struct hwseq_wa_state {