EDAC, skx_edac: Fix detection of single-rank DIMMs (a9c0a108) · Commits · 戴 / test

Single-rank DIMMs did not get detected on Skylake/Kabylake systems due to wrong limit check. The single rank DIMM check is a simple typo. "0" is a legal value in this field meaning single rank. Signed-off-by:

Charles Rose <charles.rose@dell.com> Cc: Aristeu Rozanski <arozansk@redhat.com> Cc: Mauro Carvalho Chehab <mchehab@kernel.org> Cc: Qiuxu Zhuo <qiuxu.zhuo@intel.com> Cc: linux-edac <linux-edac@vger.kernel.org> Link: http://lkml.kernel.org/r/66df72d327c265fbf92fe25df96daa228a35f076.1506358467.git.tony.luck@intel.com [ Also fix debug message to print number of ranks. ] Signed-off-by:

Tony Luck <tony.luck@intel.com> [ Expand commit message. ] Signed-off-by:

Borislav Petkov <bp@suse.de>

drivers/edac/skx_edac.c

+2 −2

Original line number	Diff line number	Diff line
		@@ -301,7 +301,7 @@ static int get_dimm_attr(u32 reg, int lobit, int hibit, int add, int minval,

		#define IS_DIMM_PRESENT(mtr) GET_BITFIELD((mtr), 15, 15)

		#define numrank(reg) get_dimm_attr((reg), 12, 13, 0, 1, 2, "ranks")
		#define numrank(reg) get_dimm_attr((reg), 12, 13, 0, 0, 2, "ranks")
		#define numrow(reg) get_dimm_attr((reg), 2, 4, 12, 1, 6, "rows")
		#define numcol(reg) get_dimm_attr((reg), 0, 1, 10, 0, 2, "cols")

		@@ -362,7 +362,7 @@ static int get_dimm_info(u32 mtr, u32 amap, struct dimm_info *dimm,

		edac_dbg(0, "mc#%d: channel %d, dimm %d, %lld Mb (%d pages) bank: %d, rank: %d, row: %#x, col: %#x\n",
		imc->mc, chan, dimmno, size, npages,
		banks, ranks, rows, cols);
		banks, 1 << ranks, rows, cols);

		imc->chan[chan].dimms[dimmno].close_pg = GET_BITFIELD(mtr, 0, 0);
		imc->chan[chan].dimms[dimmno].bank_xor_enable = GET_BITFIELD(mtr, 9, 9);

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