Commit a9c03783 authored by Ajay Kumar Gupta's avatar Ajay Kumar Gupta Committed by Felipe Balbi
Browse files

musb: am35x: fix compile error due to control apis 



commit 4814ced5 (OMAP:
control: move plat-omap/control.h to mach-omap2/control.h)
moved <plat/control.h> to another location, preventing
drivers from accessing it, so we need to pass function
pointers from arch code to be able to talk to internal
PHY on AM35x.

Signed-off-by: default avatarAjay Kumar Gupta <ajay.gupta@ti.com>
Signed-off-by: default avatarFelipe Balbi <balbi@ti.com>
parent 46960847

arch/arm/mach-omap2/usb-musb.c

+97 −0
Original line number Diff line number Diff line
@@ -30,9 +30,102 @@ 
#include <mach/irqs.h>

#include <mach/am35xx.h>

#include <plat/usb.h>

#include "control.h"



#if defined(CONFIG_USB_MUSB_OMAP2PLUS) || defined (CONFIG_USB_MUSB_AM35X)



static void am35x_musb_reset(void)

{

	u32	regval;



	/* Reset the musb interface */

	regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);



	regval |= AM35XX_USBOTGSS_SW_RST;

	omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET);



	regval &= ~AM35XX_USBOTGSS_SW_RST;

	omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET);



	regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);

}



static void am35x_musb_phy_power(u8 on)

{

	unsigned long timeout = jiffies + msecs_to_jiffies(100);

	u32 devconf2;



	if (on) {

		/*

		 * Start the on-chip PHY and its PLL.

		 */

		devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2);



		devconf2 &= ~(CONF2_RESET | CONF2_PHYPWRDN | CONF2_OTGPWRDN);

		devconf2 |= CONF2_PHY_PLLON;



		omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);



		pr_info(KERN_INFO "Waiting for PHY clock good...\n");

		while (!(omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2)

				& CONF2_PHYCLKGD)) {

			cpu_relax();



			if (time_after(jiffies, timeout)) {

				pr_err(KERN_ERR "musb PHY clock good timed out\n");

				break;

			}

		}

	} else {

		/*

		 * Power down the on-chip PHY.

		 */

		devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2);



		devconf2 &= ~CONF2_PHY_PLLON;

		devconf2 |=  CONF2_PHYPWRDN | CONF2_OTGPWRDN;

		omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);

	}

}



static void am35x_musb_clear_irq(void)

{

	u32 regval;



	regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);

	regval |= AM35XX_USBOTGSS_INT_CLR;

	omap_ctrl_writel(regval, AM35XX_CONTROL_LVL_INTR_CLEAR);

	regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);

}



static void am35x_musb_set_mode(u8 musb_mode)

{

	u32 devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2);



	devconf2 &= ~CONF2_OTGMODE;

	switch (musb_mode) {

#ifdef	CONFIG_USB_MUSB_HDRC_HCD

	case MUSB_HOST:		/* Force VBUS valid, ID = 0 */

		devconf2 |= CONF2_FORCE_HOST;

		break;

#endif

#ifdef	CONFIG_USB_GADGET_MUSB_HDRC

	case MUSB_PERIPHERAL:	/* Force VBUS valid, ID = 1 */

		devconf2 |= CONF2_FORCE_DEVICE;

		break;

#endif

#ifdef	CONFIG_USB_MUSB_OTG

	case MUSB_OTG:		/* Don't override the VBUS/ID comparators */

		devconf2 |= CONF2_NO_OVERRIDE;

		break;

#endif

	default:

		pr_info(KERN_INFO "Unsupported mode %u\n", musb_mode);

	}



	omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);

}



static struct resource musb_resources[] = {

	[0] = { /* start and end set dynamically */

		.flags	= IORESOURCE_MEM,
@@ -96,6 +189,10 @@ void __init usb_musb_init(struct omap_musb_board_data *board_data) 
		musb_device.name = "musb-am35x";

		musb_resources[0].start = AM35XX_IPSS_USBOTGSS_BASE;

		musb_resources[1].start = INT_35XX_USBOTG_IRQ;

		board_data->set_phy_power = am35x_musb_phy_power;

		board_data->clear_irq = am35x_musb_clear_irq;

		board_data->set_mode = am35x_musb_set_mode;

		board_data->reset = am35x_musb_reset;

	} else if (cpu_is_omap34xx()) {

		musb_resources[0].start = OMAP34XX_HSUSB_OTG_BASE;

	} else if (cpu_is_omap44xx()) {

arch/arm/plat-omap/include/plat/usb.h

+4 −0
Original line number Diff line number Diff line
@@ -70,6 +70,10 @@ struct omap_musb_board_data { 
	u8	mode;

	u16	power;

	unsigned extvbus:1;

	void	(*set_phy_power)(u8 on);

	void	(*clear_irq)(void);

	void	(*set_mode)(u8 mode);

	void	(*reset)(void);

};



enum musb_interface    {MUSB_INTERFACE_ULPI, MUSB_INTERFACE_UTMI};

drivers/usb/musb/am35x.c

+45 −85
Original line number Diff line number Diff line
@@ -32,7 +32,6 @@ 
#include <linux/platform_device.h>

#include <linux/dma-mapping.h>



#include <plat/control.h>

#include <plat/usb.h>



#include "musb_core.h"
@@ -90,47 +89,6 @@ struct am35x_glue { 
};

#define glue_to_musb(g)		platform_get_drvdata(g->musb)



static inline void phy_on(void)

{

	unsigned long timeout = jiffies + msecs_to_jiffies(100);

	u32 devconf2;



	/*

	 * Start the on-chip PHY and its PLL.

	 */

	devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2);



	devconf2 &= ~(CONF2_RESET | CONF2_PHYPWRDN | CONF2_OTGPWRDN);

	devconf2 |= CONF2_PHY_PLLON;



	omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);



	DBG(1, "Waiting for PHY clock good...\n");

	while (!(omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2)

			& CONF2_PHYCLKGD)) {

		cpu_relax();



		if (time_after(jiffies, timeout)) {

			DBG(1, "musb PHY clock good timed out\n");

			break;

		}

	}

}



static inline void phy_off(void)

{

	u32 devconf2;



	/*

	 * Power down the on-chip PHY.

	 */

	devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2);



	devconf2 &= ~CONF2_PHY_PLLON;

	devconf2 |=  CONF2_PHYPWRDN | CONF2_OTGPWRDN;

	omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);

}



/*

 * am35x_musb_enable - enable interrupts

 */
@@ -265,9 +223,12 @@ static irqreturn_t am35x_musb_interrupt(int irq, void *hci) 
{

	struct musb  *musb = hci;

	void __iomem *reg_base = musb->ctrl_base;

	struct device *dev = musb->controller;

	struct musb_hdrc_platform_data *plat = dev->platform_data;

	struct omap_musb_board_data *data = plat->board_data;

	unsigned long flags;

	irqreturn_t ret = IRQ_NONE;

	u32 epintr, usbintr, lvl_intr;

	u32 epintr, usbintr;



	spin_lock_irqsave(&musb->lock, flags);
@@ -356,9 +317,8 @@ eoi: 
	/* EOI needs to be written for the IRQ to be re-asserted. */

	if (ret == IRQ_HANDLED || epintr || usbintr) {

		/* clear level interrupt */

		lvl_intr = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);

		lvl_intr |= AM35XX_USBOTGSS_INT_CLR;

		omap_ctrl_writel(lvl_intr, AM35XX_CONTROL_LVL_INTR_CLEAR);

		if (data->clear_irq)

			data->clear_irq();

		/* write EOI */

		musb_writel(reg_base, USB_END_OF_INTR_REG, 0);

	}
@@ -374,37 +334,26 @@ eoi: 


static int am35x_musb_set_mode(struct musb *musb, u8 musb_mode)

{

	u32 devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2);

	struct device *dev = musb->controller;

	struct musb_hdrc_platform_data *plat = dev->platform_data;

	struct omap_musb_board_data *data = plat->board_data;

	int     retval = 0;



	devconf2 &= ~CONF2_OTGMODE;

	switch (musb_mode) {

#ifdef	CONFIG_USB_MUSB_HDRC_HCD

	case MUSB_HOST:		/* Force VBUS valid, ID = 0 */

		devconf2 |= CONF2_FORCE_HOST;

		break;

#endif

#ifdef	CONFIG_USB_GADGET_MUSB_HDRC

	case MUSB_PERIPHERAL:	/* Force VBUS valid, ID = 1 */

		devconf2 |= CONF2_FORCE_DEVICE;

		break;

#endif

#ifdef	CONFIG_USB_MUSB_OTG

	case MUSB_OTG:		/* Don't override the VBUS/ID comparators */

		devconf2 |= CONF2_NO_OVERRIDE;

		break;

#endif

	default:

		DBG(2, "Trying to set unsupported mode %u\n", musb_mode);

	}

	if (data->set_mode)

		data->set_mode(musb_mode);

	else

		retval = -EIO;



	omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);

	return 0;

	return retval;

}



static int am35x_musb_init(struct musb *musb)

{

	struct device *dev = musb->controller;

	struct musb_hdrc_platform_data *plat = dev->platform_data;

	struct omap_musb_board_data *data = plat->board_data;

	void __iomem *reg_base = musb->ctrl_base;

	u32 rev, lvl_intr, sw_reset;

	u32 rev;



	musb->mregs += USB_MENTOR_CORE_OFFSET;
@@ -421,39 +370,40 @@ static int am35x_musb_init(struct musb *musb) 
	if (is_host_enabled(musb))

		setup_timer(&otg_workaround, otg_timer, (unsigned long) musb);



	/* Global reset */

	sw_reset = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);



	sw_reset |= AM35XX_USBOTGSS_SW_RST;

	omap_ctrl_writel(sw_reset, AM35XX_CONTROL_IP_SW_RESET);



	sw_reset &= ~AM35XX_USBOTGSS_SW_RST;

	omap_ctrl_writel(sw_reset, AM35XX_CONTROL_IP_SW_RESET);

	/* Reset the musb */

	if (data->reset)

		data->reset();



	/* Reset the controller */

	musb_writel(reg_base, USB_CTRL_REG, AM35X_SOFT_RESET_MASK);



	/* Start the on-chip PHY and its PLL. */

	phy_on();

	if (data->set_phy_power)

		data->set_phy_power(1);



	msleep(5);



	musb->isr = am35x_musb_interrupt;



	/* clear level interrupt */

	lvl_intr = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);

	lvl_intr |= AM35XX_USBOTGSS_INT_CLR;

	omap_ctrl_writel(lvl_intr, AM35XX_CONTROL_LVL_INTR_CLEAR);

	if (data->clear_irq)

		data->clear_irq();



	return 0;

}



static int am35x_musb_exit(struct musb *musb)

{

	struct device *dev = musb->controller;

	struct musb_hdrc_platform_data *plat = dev->platform_data;

	struct omap_musb_board_data *data = plat->board_data;



	if (is_host_enabled(musb))

		del_timer_sync(&otg_workaround);



	phy_off();

	/* Shutdown the on-chip PHY and its PLL. */

	if (data->set_phy_power)

		data->set_phy_power(0);



	otg_put_transceiver(musb->xceiv);

	usb_nop_xceiv_unregister();
@@ -630,8 +580,13 @@ static int __exit am35x_remove(struct platform_device *pdev) 
static int am35x_suspend(struct device *dev)

{

	struct am35x_glue	*glue = dev_get_drvdata(dev);

	struct musb_hdrc_platform_data *plat = dev->platform_data;

	struct omap_musb_board_data *data = plat->board_data;



	/* Shutdown the on-chip PHY and its PLL. */

	if (data->set_phy_power)

		data->set_phy_power(0);



	phy_off();

	clk_disable(glue->phy_clk);

	clk_disable(glue->clk);
@@ -641,9 +596,14 @@ static int am35x_suspend(struct device *dev) 
static int am35x_resume(struct device *dev)

{

	struct am35x_glue	*glue = dev_get_drvdata(dev);

	struct musb_hdrc_platform_data *plat = dev->platform_data;

	struct omap_musb_board_data *data = plat->board_data;

	int			ret;



	phy_on();

	/* Start the on-chip PHY and its PLL. */

	if (data->set_phy_power)

		data->set_phy_power(1);



	ret = clk_enable(glue->phy_clk);

	if (ret) {

		dev_err(dev, "failed to enable PHY clock\n");

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