[PATCH] powerpc: Merge elf.h

#ifndef __PPC64_ELF_H

#define __PPC64_ELF_H

#ifndef _ASM_POWERPC_ELF_H

#define _ASM_POWERPC_ELF_H

#include <asm/types.h>

#include <asm/ptrace.h>

#define R_PPC_GOT_DTPREL16_HI	93 /* half16*	(sym+add)@got@dtprel@h */

#define R_PPC_GOT_DTPREL16_HA	94 /* half16*	(sym+add)@got@dtprel@ha */

/* Keep this the last entry.  */

/* keep this the last entry. */

#define R_PPC_NUM		95

/*

#define ELF_NGREG	48	/* includes nip, msr, lr, etc. */

#define ELF_NFPREG	33	/* includes fpscr */

#define ELF_NVRREG32	33	/* includes vscr & vrsave stuffed together */

#define ELF_NVRREG	34	/* includes vscr & vrsave in split vectors */

typedef unsigned long elf_greg_t64;

typedef elf_greg_t64 elf_gregset_t64[ELF_NGREG];

typedef elf_greg_t32 elf_gregset_t32[ELF_NGREG];

/*

 * These are used to set parameters in the core dumps.

 * ELF_ARCH, CLASS, and DATA are used to set parameters in the core dumps.

 */

#ifdef __powerpc64__

# define ELF_NVRREG32	33	/* includes vscr & vrsave stuffed together */

# define ELF_NVRREG	34	/* includes vscr & vrsave in split vectors */

# define ELF_GREG_TYPE	elf_greg_t64

#else

# define ELF_NEVRREG	34	/* includes acc (as 2) */

# define ELF_NVRREG	33	/* includes vscr */

# define ELF_GREG_TYPE	elf_greg_t32

# define ELF_ARCH	EM_PPC

# define ELF_CLASS	ELFCLASS32

# define ELF_DATA	ELFDATA2MSB

#endif /* __powerpc64__ */

#ifndef ELF_ARCH

# define ELF_ARCH	EM_PPC64

# define ELF_CLASS	ELFCLASS64

  typedef elf_greg_t32 elf_greg_t;

  typedef elf_gregset_t32 elf_gregset_t;

# define elf_addr_t u32

#endif

#endif /* ELF_ARCH */

/* Floating point registers */

typedef double elf_fpreg_t;

typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];

 * The entry with index 32 contains the vscr as the last word (offset 12) 

 * within the quadword.  This allows the vscr to be stored as either a 

 * quadword (since it must be copied via a vector register to/from storage) 

 * or as a word.  The entry with index 33 contains the vrsave as the first 

 * or as a word.  

 *

 * 64-bit kernel notes: The entry at index 33 contains the vrsave as the first  

 * word (offset 0) within the quadword.

 *

 * This definition of the VMX state is compatible with the current PPC32 

 */

typedef __vector128 elf_vrreg_t;

typedef elf_vrreg_t elf_vrregset_t[ELF_NVRREG];

#ifdef __powerpc64__

typedef elf_vrreg_t elf_vrregset_t32[ELF_NVRREG32];

#endif

/*

 * This is used to ensure we don't load something for the wrong architecture.

#ifdef __KERNEL__

/* Common routine for both 32-bit and 64-bit processes */

static inline void ppc64_elf_core_copy_regs(elf_gregset_t elf_regs,

static inline void ppc_elf_core_copy_regs(elf_gregset_t elf_regs,

					    struct pt_regs *regs)

{

	int i;

	int gprs = sizeof(struct pt_regs)/sizeof(elf_greg_t64);

	int gprs = sizeof(struct pt_regs)/sizeof(ELF_GREG_TYPE);

	if (gprs > ELF_NGREG)

		gprs = ELF_NGREG;

	for (i=0; i < gprs; i++)

		elf_regs[i] = (elf_greg_t)((elf_greg_t64 *)regs)[i];

		elf_regs[i] = (elf_greg_t)((ELF_GREG_TYPE *)regs)[i];

	memset((char *)(elf_regs) + sizeof(struct pt_regs), 0,  	\

	       sizeof(elf_gregset_t) - sizeof(struct pt_regs));

}

#define ELF_CORE_COPY_REGS(gregs, regs) ppc64_elf_core_copy_regs(gregs, regs);

#define ELF_CORE_COPY_REGS(gregs, regs) ppc_elf_core_copy_regs(gregs, regs);

static inline int dump_task_regs(struct task_struct *tsk,

				 elf_gregset_t *elf_regs)

{

	struct pt_regs *regs = tsk->thread.regs;

	if (regs)

		ppc64_elf_core_copy_regs(*elf_regs, regs);

		ppc_elf_core_copy_regs(*elf_regs, regs);

	return 1;

}

extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *); 

#define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) dump_task_fpu(tsk, elf_fpregs)

/* XXX Should we define the XFPREGS using altivec ??? */

#endif /* __KERNEL__ */

#endif

/* This yields a mask that user programs can use to figure out what

/* ELF_HWCAP yields a mask that user programs can use to figure out what

   instruction set this cpu supports.  This could be done in userspace,

   but it's not easy, and we've already done it here.  */

#ifdef __powerpc64__

# define ELF_HWCAP	(cur_cpu_spec->cpu_user_features)

# define ELF_PLAT_INIT(_r, load_addr)	do { \

	memset(_r->gpr, 0, sizeof(_r->gpr)); \

	_r->ctr = _r->link = _r->xer = _r->ccr = 0; \

	_r->gpr[2] = load_addr; \

} while (0)

#else

# define ELF_HWCAP	(cur_cpu_spec[0]->cpu_user_features)

#endif /* __powerpc64__ */

/* This yields a string that ld.so will use to load implementation

   specific libraries for optimization.  This is more specific in

#define ELF_PLATFORM	(NULL)

#define ELF_PLAT_INIT(_r, load_addr)	do { \

	memset(_r->gpr, 0, sizeof(_r->gpr)); \

	_r->ctr = _r->link = _r->xer = _r->ccr = 0; \

	_r->gpr[2] = load_addr; \

} while (0)

#ifdef __KERNEL__

#ifdef __powerpc64__

# define SET_PERSONALITY(ex, ibcs2)				\

do {								\

	unsigned long new_flags = 0;				\

	if (personality(current->personality) != PER_LINUX32)	\

		set_personality(PER_LINUX);			\

} while (0)

/*

 * An executable for which elf_read_implies_exec() returns TRUE will

 * have the READ_IMPLIES_EXEC personality flag set automatically. This

 */

# define elf_read_implies_exec(ex, exec_stk) (test_thread_flag(TIF_32BIT) ? \

		(exec_stk != EXSTACK_DISABLE_X) : 0)

#else 

# define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX)

#endif /* __powerpc64__ */

#endif

#endif /* __KERNEL__ */

extern int dcache_bsize;

extern int icache_bsize;

extern int ucache_bsize;

/* We do have an arch_setup_additional_pages for vDSO matters */

#define ARCH_HAS_SETUP_ADDITIONAL_PAGES

#ifdef __powerpc64__

struct linux_binprm;

#define ARCH_HAS_SETUP_ADDITIONAL_PAGES	/* vDSO has arch_setup_additional_pages */

extern int arch_setup_additional_pages(struct linux_binprm *bprm, int executable_stack);

#define VDSO_AUX_ENT(a,b) NEW_AUX_ENT(a,b);

#else

#define VDSO_AUX_ENT(a,b)

#endif /* __powerpc64__ */

/*

 * The requirements here are:

	NEW_AUX_ENT(AT_DCACHEBSIZE, dcache_bsize);			\

	NEW_AUX_ENT(AT_ICACHEBSIZE, icache_bsize);			\

	NEW_AUX_ENT(AT_UCACHEBSIZE, ucache_bsize);			\

	/* vDSO base */							\

	NEW_AUX_ENT(AT_SYSINFO_EHDR, current->thread.vdso_base);       	\

	VDSO_AUX_ENT(AT_SYSINFO_EHDR, current->thread.vdso_base)	\

} while (0)

/* PowerPC64 relocations defined by the ABIs */

/* Keep this the last entry.  */

#define R_PPC64_NUM		107

#endif /* __PPC64_ELF_H */

#endif /* _ASM_POWERPC_ELF_H */

#ifndef __PPC_ELF_H

#define __PPC_ELF_H

/*

 * ELF register definitions..

 */

#include <asm/types.h>

#include <asm/ptrace.h>

#include <asm/cputable.h>

#include <asm/auxvec.h>

/* PowerPC relocations defined by the ABIs */

#define R_PPC_NONE		0

#define R_PPC_ADDR32		1	/* 32bit absolute address */

#define R_PPC_ADDR24		2	/* 26bit address, 2 bits ignored.  */

#define R_PPC_ADDR16		3	/* 16bit absolute address */

#define R_PPC_ADDR16_LO		4	/* lower 16bit of absolute address */

#define R_PPC_ADDR16_HI		5	/* high 16bit of absolute address */

#define R_PPC_ADDR16_HA		6	/* adjusted high 16bit */

#define R_PPC_ADDR14		7	/* 16bit address, 2 bits ignored */

#define R_PPC_ADDR14_BRTAKEN	8

#define R_PPC_ADDR14_BRNTAKEN	9

#define R_PPC_REL24		10	/* PC relative 26 bit */

#define R_PPC_REL14		11	/* PC relative 16 bit */

#define R_PPC_REL14_BRTAKEN	12

#define R_PPC_REL14_BRNTAKEN	13

#define R_PPC_GOT16		14

#define R_PPC_GOT16_LO		15

#define R_PPC_GOT16_HI		16

#define R_PPC_GOT16_HA		17

#define R_PPC_PLTREL24		18

#define R_PPC_COPY		19

#define R_PPC_GLOB_DAT		20

#define R_PPC_JMP_SLOT		21

#define R_PPC_RELATIVE		22

#define R_PPC_LOCAL24PC		23

#define R_PPC_UADDR32		24

#define R_PPC_UADDR16		25

#define R_PPC_REL32		26

#define R_PPC_PLT32		27

#define R_PPC_PLTREL32		28

#define R_PPC_PLT16_LO		29

#define R_PPC_PLT16_HI		30

#define R_PPC_PLT16_HA		31

#define R_PPC_SDAREL16		32

#define R_PPC_SECTOFF		33

#define R_PPC_SECTOFF_LO	34

#define R_PPC_SECTOFF_HI	35

#define R_PPC_SECTOFF_HA	36

/* Keep this the last entry.  */

#define R_PPC_NUM		37

#define ELF_NGREG	48	/* includes nip, msr, lr, etc. */

#define ELF_NFPREG	33	/* includes fpscr */

#define ELF_NVRREG	33	/* includes vscr */

#define ELF_NEVRREG	34	/* includes acc (as 2) */

/*

 * These are used to set parameters in the core dumps.

 */

#define ELF_ARCH	EM_PPC

#define ELF_CLASS	ELFCLASS32

#define ELF_DATA	ELFDATA2MSB

/* General registers */

typedef unsigned long elf_greg_t;

typedef elf_greg_t elf_gregset_t[ELF_NGREG];

/* Floating point registers */

typedef double elf_fpreg_t;

typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];

/* Altivec registers */

typedef __vector128 elf_vrreg_t;

typedef elf_vrreg_t elf_vrregset_t[ELF_NVRREG];

#ifdef __KERNEL__

struct task_struct;

/*

 * This is used to ensure we don't load something for the wrong architecture.

 */

#define elf_check_arch(x) ((x)->e_machine == EM_PPC)

/* This is the location that an ET_DYN program is loaded if exec'ed.  Typical

   use of this is to invoke "./ld.so someprog" to test out a new version of

   the loader.  We need to make sure that it is out of the way of the program

   that it will "exec", and that there is sufficient room for the brk.  */

#define ELF_ET_DYN_BASE         (0x08000000)

#define USE_ELF_CORE_DUMP

#define ELF_EXEC_PAGESIZE	4096

#define ELF_CORE_COPY_REGS(gregs, regs)				\

	memcpy((gregs), (regs), sizeof(struct pt_regs));	\

	memset((char *)(gregs) + sizeof(struct pt_regs), 0,	\

	       sizeof(elf_gregset_t) - sizeof(struct pt_regs));

#define ELF_CORE_COPY_TASK_REGS(t, elfregs)			\

	((t)->thread.regs?					\

	 ({ ELF_CORE_COPY_REGS((elfregs), (t)->thread.regs); 1; }): 0)

extern int dump_task_fpu(struct task_struct *t, elf_fpregset_t *fpu);

#define ELF_CORE_COPY_FPREGS(t, fpu)	dump_task_fpu((t), (fpu))

/* This yields a mask that user programs can use to figure out what

   instruction set this cpu supports.  This could be done in userspace,

   but it's not easy, and we've already done it here.  */

#define ELF_HWCAP	(cur_cpu_spec[0]->cpu_user_features)

/* This yields a string that ld.so will use to load implementation

   specific libraries for optimization.  This is more specific in

   intent than poking at uname or /proc/cpuinfo.

   For the moment, we have only optimizations for the Intel generations,

   but that could change... */

#define ELF_PLATFORM	(NULL)

#define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX)

extern int dcache_bsize;

extern int icache_bsize;

extern int ucache_bsize;

/*

 * The requirements here are:

 * - keep the final alignment of sp (sp & 0xf)

 * - make sure the 32-bit value at the first 16 byte aligned position of

 *   AUXV is greater than 16 for glibc compatibility.

 *   AT_IGNOREPPC is used for that.

 * - for compatibility with glibc ARCH_DLINFO must always be defined on PPC,

 *   even if DLINFO_ARCH_ITEMS goes to zero or is undefined.

 */

#define ARCH_DLINFO							\

do {									\

	/* Handle glibc compatibility. */				\

	NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC);			\

	NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC);			\

	/* Cache size items */						\

	NEW_AUX_ENT(AT_DCACHEBSIZE, dcache_bsize);			\

	NEW_AUX_ENT(AT_ICACHEBSIZE, icache_bsize);			\

	NEW_AUX_ENT(AT_UCACHEBSIZE, ucache_bsize);			\

 } while (0)

#endif /* __KERNEL__ */

#endif