drm/amd/powerplay: add override pcie parameters for Vega20 (a97c084a) · Commits · 戴 / test

drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

+46 −0

Original line number	Diff line number	Diff line
		@@ -771,6 +771,47 @@ static int vega20_init_smc_table(struct pp_hwmgr *hwmgr)
		return 0;
		}

		static int vega20_override_pcie_parameters(struct pp_hwmgr *hwmgr)
		{
		struct amdgpu_device adev = (struct amdgpu_device )(hwmgr->adev);
		uint32_t pcie_speed = 0, pcie_width = 0, pcie_arg;
		int ret;

		if (adev->pm.pcie_gen_mask & CAIL_PCIE_LINK_SPEED_SUPPORT_GEN4)
		pcie_speed = 16;
		else if (adev->pm.pcie_gen_mask & CAIL_PCIE_LINK_SPEED_SUPPORT_GEN3)
		pcie_speed = 8;
		else if (adev->pm.pcie_gen_mask & CAIL_PCIE_LINK_SPEED_SUPPORT_GEN2)
		pcie_speed = 5;
		else if (adev->pm.pcie_gen_mask & CAIL_PCIE_LINK_SPEED_SUPPORT_GEN1)
		pcie_speed = 2;

		if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X32)
		pcie_width = 32;
		else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X16)
		pcie_width = 16;
		else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X12)
		pcie_width = 12;
		else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X8)
		pcie_width = 8;
		else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X4)
		pcie_width = 4;
		else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X2)
		pcie_width = 2;
		else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X1)
		pcie_width = 1;

		pcie_arg = pcie_width \| (pcie_speed << 8);

		ret = smum_send_msg_to_smc_with_parameter(hwmgr,
		PPSMC_MSG_OverridePcieParameters, pcie_arg);
		PP_ASSERT_WITH_CODE(!ret,
		"[OverridePcieParameters] Attempt to override pcie params failed!",
		return ret);

		return 0;
		}

		static int vega20_set_allowed_featuresmask(struct pp_hwmgr *hwmgr)
		{
		struct vega20_hwmgr *data =
		@@ -1570,6 +1611,11 @@ static int vega20_enable_dpm_tasks(struct pp_hwmgr *hwmgr)
		"[EnableDPMTasks] Failed to initialize SMC table!",
		return result);

		result = vega20_override_pcie_parameters(hwmgr);
		PP_ASSERT_WITH_CODE(!result,
		"[EnableDPMTasks] Failed to override pcie parameters!",
		return result);

		result = vega20_run_btc(hwmgr);
		PP_ASSERT_WITH_CODE(!result,
		"[EnableDPMTasks] Failed to run btc!",

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