phylib: add reset after clk enable support (a9668491) · Commits · 戴 / test

Some PHYs need the refclk to be a continuous clock. Therefore they don't allow turning it off and on again during operation. Nonetheless such a clock switching is performed by some ETH drivers (namely FEC [1]) for power saving reasons. An example for an affected PHY is the SMSC/Microchip LAN8720 in "REF_CLK In Mode". In order to provide a uniform method to overcome this problem this patch adds a new phy_driver flag (PHY_RST_AFTER_CLK_EN) and corresponding function phy_reset_after_clk_enable() to the phylib. These should be used to trigger reset of the PHY after the refclk is switched on again. [1] commit ("net: fec: optimize the clock management to save power") Signed-off-by:

Richard Leitner <richard.leitner@skidata.com> Reviewed-by:

Andrew Lunn <andrew@lunn.ch> Signed-off-by:

David S. Miller <davem@davemloft.net>

drivers/net/phy/phy_device.c

+24 −0

Original line number	Diff line number	Diff line
		@@ -1218,6 +1218,30 @@ out:
		}
		EXPORT_SYMBOL(phy_loopback);

		/**
		* phy_reset_after_clk_enable - perform a PHY reset if needed
		* @phydev: target phy_device struct
		*
		* Description: Some PHYs are known to need a reset after their refclk was
		* enabled. This function evaluates the flags and perform the reset if it's
		* needed. Returns < 0 on error, 0 if the phy wasn't reset and 1 if the phy
		* was reset.
		*/
		int phy_reset_after_clk_enable(struct phy_device *phydev)
		{
		if (!phydev \|\| !phydev->drv)
		return -ENODEV;

		if (phydev->drv->flags & PHY_RST_AFTER_CLK_EN) {
		phy_device_reset(phydev, 1);
		phy_device_reset(phydev, 0);
		return 1;
		}

		return 0;
		}
		EXPORT_SYMBOL(phy_reset_after_clk_enable);

		/* Generic PHY support and helper functions */

		/**

include/linux/phy.h

+2 −0

Original line number	Diff line number	Diff line
		@@ -59,6 +59,7 @@

		#define PHY_HAS_INTERRUPT 0x00000001
		#define PHY_IS_INTERNAL 0x00000002
		#define PHY_RST_AFTER_CLK_EN 0x00000004
		#define MDIO_DEVICE_IS_PHY 0x80000000

		/* Interface Mode definitions */
		@@ -853,6 +854,7 @@ int phy_aneg_done(struct phy_device *phydev);

		int phy_stop_interrupts(struct phy_device *phydev);
		int phy_restart_aneg(struct phy_device *phydev);
		int phy_reset_after_clk_enable(struct phy_device *phydev);

		static inline void phy_device_reset(struct phy_device *phydev, int value)
		{

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