Commit a95dfc1e authored by Alan Cox's avatar Alan Cox Committed by Greg Kroah-Hartman
Browse files

gma500: move configuration bits into the psb_ops structure 



We can stuff things like the number of pipes and the SGX offset away in
here as well and clean up more conditional code.

Signed-off-by: default avatarAlan Cox <alan@linux.intel.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent 89e5d557

drivers/staging/gma500/mdfld_device.c

+6 −0
Original line number Diff line number Diff line
@@ -26,6 +26,7 @@ 
#include "psb_drv.h"

#include "mdfld_output.h"

#include "mdfld_dsi_output.h"

#include "mrst_bios.h"



/*

 *	Provide the Medfield specific backlight management
@@ -689,6 +690,11 @@ static int mdfld_power_up(struct drm_device *dev) 
const struct psb_ops mdfld_chip_ops = {

	.name = "Medfield",

	.accel_2d = 0,

	.pipes = 3,

	.sgx_offset = MRST_SGX_OFFSET,



	.chip_setup = mid_chip_setup,



	.crtc_helper = &mdfld_helper_funcs,

	.crtc_funcs = &mdfld_intel_crtc_funcs,

drivers/staging/gma500/mrst_bios.c

+11 −3
Original line number Diff line number Diff line
@@ -35,7 +35,7 @@ module_param_named(panel_id, panel_id, int, 0600); 
MODULE_PARM_DESC(panel_id, "Panel Identifier");





void mrst_get_fuse_settings(struct drm_device *dev)

static void mid_get_fuse_settings(struct drm_device *dev)

{

	struct drm_psb_private *dev_priv = dev->dev_private;

	struct pci_dev *pci_root = pci_get_bus_and_slot(0, 0);
@@ -102,7 +102,7 @@ void mrst_get_fuse_settings(struct drm_device *dev) 
/*

 *	Get the revison ID, B0:D2:F0;0x08

 */

void mid_get_pci_revID(struct drm_psb_private *dev_priv)

static void mid_get_pci_revID(struct drm_psb_private *dev_priv)

{

	uint32_t platform_rev_id = 0;

	struct pci_dev *pci_gfx_root = pci_get_bus_and_slot(0, PCI_DEVFN(2, 0));
@@ -114,7 +114,7 @@ void mid_get_pci_revID(struct drm_psb_private *dev_priv) 
					dev_priv->platform_rev_id);

}



void mrst_get_vbt_data(struct drm_psb_private *dev_priv)

static void mid_get_vbt_data(struct drm_psb_private *dev_priv)

{

	struct drm_device *dev = dev_priv->dev;

	struct mrst_vbt *vbt = &dev_priv->vbt_data;
@@ -261,3 +261,11 @@ void mrst_get_vbt_data(struct drm_psb_private *dev_priv) 
	}

}



int mid_chip_setup(struct drm_device *dev)

{

	struct drm_psb_private *dev_priv = dev->dev_private;

	mid_get_fuse_settings(dev);

	mid_get_vbt_data(dev_priv);

	mid_get_pci_revID(dev_priv);

	return 0;

}
 
 No newline at end of file

drivers/staging/gma500/mrst_bios.h

+2 −3
Original line number Diff line number Diff line
@@ -17,6 +17,5 @@ 
 *

 **************************************************************************/



extern void mrst_get_fuse_settings(struct drm_device *dev);

extern void mid_get_pci_revID(struct drm_psb_private *dev_priv);

extern void mrst_get_vbt_data(struct drm_psb_private *dev_priv);
 
extern int mid_chip_setup(struct drm_device *dev);

drivers/staging/gma500/mrst_device.c

+5 −0
Original line number Diff line number Diff line
@@ -25,6 +25,7 @@ 
#include "psb_reg.h"

#include "psb_intel_reg.h"

#include <asm/intel_scu_ipc.h>

#include "mrst_bios.h"



/* IPC message and command defines used to enable/disable mipi panel voltages */

#define IPC_MSG_PANEL_ON_OFF    0xE9
@@ -354,6 +355,10 @@ static int mrst_power_up(struct drm_device *dev) 
const struct psb_ops mrst_chip_ops = {

	.name = "Moorestown",

	.accel_2d = 1,

	.pipes = 1,

	.sgx_offset = MRST_SGX_OFFSET,



	.chip_setup = mid_chip_setup,

	.crtc_helper = &mrst_helper_funcs,

	.crtc_funcs = &psb_intel_crtc_funcs,

drivers/staging/gma500/psb_device.c

+52 −2
Original line number Diff line number Diff line
@@ -271,19 +271,69 @@ static int psb_restore_display_registers(struct drm_device *dev) 
	return 0;

}



int psb_power_down(struct drm_device *dev)

static int psb_power_down(struct drm_device *dev)

{

	return 0;

}



int psb_power_up(struct drm_device *dev)

static int psb_power_up(struct drm_device *dev)

{

	return 0;

}



static void psb_get_core_freq(struct drm_device *dev)

{

	uint32_t clock;

	struct pci_dev *pci_root = pci_get_bus_and_slot(0, 0);

	struct drm_psb_private *dev_priv = dev->dev_private;



	/*pci_write_config_dword(pci_root, 0xD4, 0x00C32004);*/

	/*pci_write_config_dword(pci_root, 0xD0, 0xE0033000);*/



	pci_write_config_dword(pci_root, 0xD0, 0xD0050300);

	pci_read_config_dword(pci_root, 0xD4, &clock);

	pci_dev_put(pci_root);



	switch (clock & 0x07) {

	case 0:

		dev_priv->core_freq = 100;

		break;

	case 1:

		dev_priv->core_freq = 133;

		break;

	case 2:

		dev_priv->core_freq = 150;

		break;

	case 3:

		dev_priv->core_freq = 178;

		break;

	case 4:

		dev_priv->core_freq = 200;

		break;

	case 5:

	case 6:

	case 7:

		dev_priv->core_freq = 266;

	default:

		dev_priv->core_freq = 0;

	}

}



static int psb_chip_setup(struct drm_device *dev)

{

	psb_get_core_freq(dev);

	psb_intel_opregion_init(dev);

	psb_intel_init_bios(dev);

	return 0;

}



const struct psb_ops psb_chip_ops = {

	.name = "Poulsbo",

	.accel_2d = 1,

	.pipes = 2,

	.sgx_offset = PSB_SGX_OFFSET,

	.chip_setup = psb_chip_setup,



	.crtc_helper = &psb_intel_helper_funcs,

	.crtc_funcs = &psb_intel_crtc_funcs,

CRA Git | Maintained and supported by SUSTech CRA and CCSE