+20
−2
+27
−0
arch/arm/mach-mmp/mmp3.c
0 → 100644
+29
−0
+2
−1
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Similar to MMP2, which this patch is based on. Known differencies from MMP2
are:
* Two PJ4B cores instead of one PJ4
* Tauros 3 L2 cache controller instead of Tauros 2
* A GIC interrupt controller optionally used instead of the MMP one
* A TWD local timer
* Different USB2 PHY
* A USB3 SS controller
* More interrupt muxes
Hard to tell what else is different, because documentation is not
available.
Signed-off-by:
Lubomir Rintel <lkundrak@v3.sk>
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