Commit a9005b67 authored Apr 06, 2012 by Stephen Warren Committed by Mark Brown Apr 06, 2012

ASoC: tegra: set a sensible initial clock rate



Initialize the audio clock tree appropriately for some reasonable rate.
This makes sure the PLLs etc. are actually programmed to something
reasonable when the audio driver is loaded.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>

parent 17933db2

sound/soc/tegra/tegra_asoc_utils.c

+6 −0

Original line number	Diff line number	Diff line
		@@ -133,8 +133,14 @@ int tegra_asoc_utils_init(struct tegra_asoc_utils_data *data,
		goto err_put_pll_a_out0;
		}

		ret = tegra_asoc_utils_set_rate(data, 44100, 256 * 44100);
		if (ret)
		goto err_put_cdev1;

		return 0;

		err_put_cdev1:
		clk_put(data->clk_cdev1);
		err_put_pll_a_out0:
		clk_put(data->clk_pll_a_out0);
		err_put_pll_a:

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