Commit a8ab4268 authored by Mathieu Poirier's avatar Mathieu Poirier Committed by Greg Kroah-Hartman
Browse files

coresight: tmc: cleaning up header file 



This patch first move the TMC_STS_TMCREADY_BIT and
TMC_FFCR_FLUSHMAN_BIT defines to their respective section.
It also removes TMC_FFCR_FLUSHMAN, since the same result
can easily be obtained using the BIT() macro.

Signed-off-by: default avatarMathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: default avatarSuzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 4c324b5f

drivers/hwtracing/coresight/coresight-tmc.c

+1 −1
Original line number Diff line number Diff line
@@ -50,7 +50,7 @@ static void tmc_flush_and_stop(struct tmc_drvdata *drvdata) 
	ffcr = readl_relaxed(drvdata->base + TMC_FFCR);

	ffcr |= TMC_FFCR_STOP_ON_FLUSH;

	writel_relaxed(ffcr, drvdata->base + TMC_FFCR);

	ffcr |= TMC_FFCR_FLUSHMAN;

	ffcr |= BIT(TMC_FFCR_FLUSHMAN_BIT);

	writel_relaxed(ffcr, drvdata->base + TMC_FFCR);

	/* Ensure flush completes */

	if (coresight_timeout(drvdata->base,

drivers/hwtracing/coresight/coresight-tmc.h

+2 −3
Original line number Diff line number Diff line
@@ -49,6 +49,7 @@ 
/* TMC_CTL - 0x020 */

#define TMC_CTL_CAPT_EN		BIT(0)

/* TMC_STS - 0x00C */

#define TMC_STS_TMCREADY_BIT	2

#define TMC_STS_TRIGGERED	BIT(1)

/* TMC_AXICTL - 0x110 */

#define TMC_AXICTL_PROT_CTL_B0	BIT(0)
@@ -56,16 +57,14 @@ 
#define TMC_AXICTL_SCT_GAT_MODE	BIT(7)

#define TMC_AXICTL_WR_BURST_16	0xF00

/* TMC_FFCR - 0x304 */

#define TMC_FFCR_FLUSHMAN_BIT	6

#define TMC_FFCR_EN_FMT		BIT(0)

#define TMC_FFCR_EN_TI		BIT(1)

#define TMC_FFCR_FON_FLIN	BIT(4)

#define TMC_FFCR_FON_TRIG_EVT	BIT(5)

#define TMC_FFCR_FLUSHMAN	BIT(6)

#define TMC_FFCR_TRIGON_TRIGIN	BIT(8)

#define TMC_FFCR_STOP_ON_FLUSH	BIT(12)



#define TMC_STS_TMCREADY_BIT	2

#define TMC_FFCR_FLUSHMAN_BIT	6



enum tmc_config_type {

	TMC_CONFIG_TYPE_ETB,

CRA Git | Maintained and supported by SUSTech CRA and CCSE