Commit a8282bf0 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull powerpc fixes from Michael Ellerman:
 "This is a frustratingly large batch at rc5. Some of these were sent
  earlier but were missed by me due to being distracted by other things,
  and some took a while to track down due to needing manual bisection on
  old hardware. But still we clearly need to improve our testing of KVM,
  and of 32-bit, so that we catch these earlier.

  Summary: seven fixes, all for bugs introduced this cycle.

   - The commit to add KASAN support broke booting on 32-bit SMP
     machines, due to a refactoring that moved some setup out of the
     secondary CPU path.

   - A fix for another 32-bit SMP bug introduced by the fast syscall
     entry implementation for 32-bit BOOKE. And a build fix for the same
     commit.

   - Our change to allow the DAWR to be force enabled on Power9
     introduced a bug in KVM, where we clobber r3 leading to a host
     crash.

   - The same commit also exposed a previously unreachable bug in the
     nested KVM handling of DAWR, which could lead to an oops in a
     nested host.

   - One of the DMA reworks broke the b43legacy WiFi driver on some
     people's powermacs, fix it by enabling a 30-bit ZONE_DMA on 32-bit.

   - A fix for TLB flushing in KVM introduced a new bug, as it neglected
     to also flush the ERAT, this could lead to memory corruption in the
     guest.

  Thanks to: Aaro Koskinen, Christoph Hellwig, Christophe Leroy, Larry
  Finger, Michael Neuling, Suraj Jitindar Singh"

* tag 'powerpc-5.2-5' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux:
  KVM: PPC: Book3S HV: Invalidate ERAT when flushing guest TLB entries
  powerpc: enable a 30-bit ZONE_DMA for 32-bit pmac
  KVM: PPC: Book3S HV: Only write DAWR[X] when handling h_set_dawr in real mode
  KVM: PPC: Book3S HV: Fix r3 corruption in h_set_dabr()
  powerpc/32: fix build failure on book3e with KVM
  powerpc/booke: fix fast syscall entry on SMP
  powerpc/32s: fix initial setup of segment registers on secondary CPU
parents 693cd8ce 50087112
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+7 −0
Original line number Diff line number Diff line
@@ -319,6 +319,13 @@ struct vm_area_struct;
#endif /* __ASSEMBLY__ */
#include <asm/slice.h>

/*
 * Allow 30-bit DMA for very limited Broadcom wifi chips on many powerbooks.
 */
#ifdef CONFIG_PPC32
#define ARCH_ZONE_DMA_BITS 30
#else
#define ARCH_ZONE_DMA_BITS 31
#endif

#endif /* _ASM_POWERPC_PAGE_H */
+1 −0
Original line number Diff line number Diff line
@@ -752,6 +752,7 @@ __secondary_start:
	stw	r0,0(r3)

	/* load up the MMU */
	bl	load_segment_registers
	bl	load_up_mmu

	/* ptr to phys current thread */
+5 −5
Original line number Diff line number Diff line
@@ -83,7 +83,7 @@ END_BTB_FLUSH_SECTION
	SAVE_4GPRS(3, r11);						     \
	SAVE_2GPRS(7, r11)

.macro SYSCALL_ENTRY trapno intno
.macro SYSCALL_ENTRY trapno intno srr1
	mfspr	r10, SPRN_SPRG_THREAD
#ifdef CONFIG_KVM_BOOKE_HV
BEGIN_FTR_SECTION
@@ -94,7 +94,7 @@ BEGIN_FTR_SECTION
	mfspr	r11, SPRN_SRR1
	mtocrf	0x80, r11	/* check MSR[GS] without clobbering reg */
	bf	3, 1975f
	b	kvmppc_handler_BOOKE_INTERRUPT_\intno\()_SPRN_SRR1
	b	kvmppc_handler_\intno\()_\srr1
1975:
	mr	r12, r13
	lwz	r13, THREAD_NORMSAVE(2)(r10)
@@ -145,9 +145,9 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_EMB_HV)
	tophys(r11,r11)
	addi	r11,r11,global_dbcr0@l
#ifdef CONFIG_SMP
	lwz	r9,TASK_CPU(r2)
	slwi	r9,r9,3
	add	r11,r11,r9
	lwz	r10, TASK_CPU(r2)
	slwi	r10, r10, 3
	add	r11, r11, r10
#endif
	lwz	r12,0(r11)
	mtspr	SPRN_DBCR0,r12
+1 −1
Original line number Diff line number Diff line
@@ -409,7 +409,7 @@ interrupt_base:

	/* System Call Interrupt */
	START_EXCEPTION(SystemCall)
	SYSCALL_ENTRY   0xc00 SYSCALL
	SYSCALL_ENTRY   0xc00 BOOKE_INTERRUPT_SYSCALL SPRN_SRR1

	/* Auxiliary Processor Unavailable Interrupt */
	EXCEPTION(0x2900, AP_UNAVAIL, AuxillaryProcessorUnavailable, \
+1 −0
Original line number Diff line number Diff line
@@ -830,6 +830,7 @@ static void flush_guest_tlb(struct kvm *kvm)
		}
	}
	asm volatile("ptesync": : :"memory");
	asm volatile(PPC_INVALIDATE_ERAT : : :"memory");
}

void kvmppc_check_need_tlb_flush(struct kvm *kvm, int pcpu,
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