Commit a824e63c authored Mar 09, 2018 by Sergei Shtylyov Committed by Simon Horman May 16, 2018

arm64: dts: renesas: condor: add SCIF0 pins



Add the (previously omitted) SCIF0 pin data to the Condor board's
device tree.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

parent cef26946

arch/arm64/boot/dts/renesas/r8a77980-condor.dts

+15 −0

Original line number	Diff line number	Diff line
		@@ -49,7 +49,22 @@
		clock-frequency = <32768>;
		};

		&pfc {
		scif0_pins: scif0 {
		groups = "scif0_data";
		function = "scif0";
		};

		scif_clk_pins: scif_clk {
		groups = "scif_clk_b";
		function = "scif_clk";
		};
		};

		&scif0 {
		pinctrl-0 = <&scif0_pins>, <&scif_clk_pins>;
		pinctrl-names = "default";

		status = "okay";
		};

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