drm/i915: Add Wa_1408615072 and Wa_1407596294 to icl,ehl (a7f3ad37) · Commits · 戴 / test

Workaround database indicates we should disable clock gating of both the vsunit and hsunit. Bspec: 33450 Bspec: 33451 Cc: stable@kernel.vger.org Cc: Lucas De Marchi <lucas.demarchi@intel.com> Cc: Matt Atwood <matthew.s.atwood@intel.com> Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Signed-off-by:

Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20191224012026.3157766-3-matthew.d.roper@intel.com Reviewed-by:

Lucas De Marchi <lucas.demarchi@intel.com> (cherry picked from commit ) Signed-off-by:

Joonas Lahtinen <joonas.lahtinen@linux.intel.com>

drivers/gpu/drm/i915/i915_reg.h

+3 −1

Original line number	Diff line number	Diff line
		@@ -4177,7 +4177,9 @@ enum {
		#define CPSSUNIT_CLKGATE_DIS REG_BIT(9)

		#define UNSLICE_UNIT_LEVEL_CLKGATE _MMIO(0x9434)
		#define VFUNIT_CLKGATE_DIS (1 << 20)
		#define VFUNIT_CLKGATE_DIS REG_BIT(20)
		#define HSUNIT_CLKGATE_DIS REG_BIT(8)
		#define VSUNIT_CLKGATE_DIS REG_BIT(3)

		#define INF_UNIT_LEVEL_CLKGATE _MMIO(0x9560)
		#define CGPSF_CLKGATE_DIS (1 << 3)

drivers/gpu/drm/i915/intel_pm.c

+8 −0

Original line number	Diff line number	Diff line
		@@ -6565,6 +6565,14 @@ static void icl_init_clock_gating(struct drm_i915_private *dev_priv)
		/* WaEnable32PlaneMode:icl */
		I915_WRITE(GEN9_CSFE_CHICKEN1_RCS,
		_MASKED_BIT_ENABLE(GEN11_ENABLE_32_PLANE_MODE));

		/*
		* Wa_1408615072:icl,ehl (vsunit)
		* Wa_1407596294:icl,ehl (hsunit)
		*/
		intel_uncore_rmw(&dev_priv->uncore, UNSLICE_UNIT_LEVEL_CLKGATE,
		0, VSUNIT_CLKGATE_DIS \| HSUNIT_CLKGATE_DIS);

		}

		static void tgl_init_clock_gating(struct drm_i915_private *dev_priv)

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