Commit a7d3bb00 authored by Rob Clark's avatar Rob Clark
Browse files

drm/msm/mdp5: add tracking for clk enable-count 



Accessing registers for an unclocked block is an insta-reboot on
snapdragon devices.  So add a bit of logic to track the enable_count so
we can WARN_ON() unclocked register writes.  This makes it much easier
to track down mistakes.

Signed-off-by: default avatarRob Clark <robdclark@gmail.com>
parent a0ce4d23

drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c

+5 −0
Original line number Original line Diff line number Diff line
@@ -249,6 +249,9 @@ int mdp5_disable(struct mdp5_kms *mdp5_kms) 
{

{

	DBG("");

	DBG("");





	mdp5_kms->enable_count--;

	WARN_ON(mdp5_kms->enable_count < 0);



	clk_disable_unprepare(mdp5_kms->ahb_clk);

	clk_disable_unprepare(mdp5_kms->ahb_clk);

	clk_disable_unprepare(mdp5_kms->axi_clk);

	clk_disable_unprepare(mdp5_kms->axi_clk);

	clk_disable_unprepare(mdp5_kms->core_clk);

	clk_disable_unprepare(mdp5_kms->core_clk);
@@ -262,6 +265,8 @@ int mdp5_enable(struct mdp5_kms *mdp5_kms) 
{

{

	DBG("");

	DBG("");





	mdp5_kms->enable_count++;



	clk_prepare_enable(mdp5_kms->ahb_clk);

	clk_prepare_enable(mdp5_kms->ahb_clk);

	clk_prepare_enable(mdp5_kms->axi_clk);

	clk_prepare_enable(mdp5_kms->axi_clk);

	clk_prepare_enable(mdp5_kms->core_clk);

	clk_prepare_enable(mdp5_kms->core_clk);

drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.h

+4 −0
Original line number Original line Diff line number Diff line
@@ -76,6 +76,8 @@ struct mdp5_kms { 
	bool rpm_enabled;

	bool rpm_enabled;





	struct mdp_irq error_handler;

	struct mdp_irq error_handler;



	int enable_count;

};

};

#define to_mdp5_kms(x) container_of(x, struct mdp5_kms, base)

#define to_mdp5_kms(x) container_of(x, struct mdp5_kms, base)
@@ -167,11 +169,13 @@ struct mdp5_encoder { 




static inline void mdp5_write(struct mdp5_kms *mdp5_kms, u32 reg, u32 data)

static inline void mdp5_write(struct mdp5_kms *mdp5_kms, u32 reg, u32 data)

{

{

	WARN_ON(mdp5_kms->enable_count <= 0);

	msm_writel(data, mdp5_kms->mmio + reg);

	msm_writel(data, mdp5_kms->mmio + reg);

}

}





static inline u32 mdp5_read(struct mdp5_kms *mdp5_kms, u32 reg)

static inline u32 mdp5_read(struct mdp5_kms *mdp5_kms, u32 reg)

{

{

	WARN_ON(mdp5_kms->enable_count <= 0);

	return msm_readl(mdp5_kms->mmio + reg);

	return msm_readl(mdp5_kms->mmio + reg);

}

}

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