Commit a760fc1b authored by Martin Leung's avatar Martin Leung Committed by Alex Deucher
Browse files

drm/amd/display: add monitor patch to disable SCDC read/write 



[why]
customer issue: found that for their specific panel, EDID register space
being overwritten during SCDC read write

[how]
customer accepted HDMI 2 features not working - disabled SCDC read/write
as well as HDMI 2 in general based on monitor patch

Signed-off-by: default avatarMartin Leung <martin.leung@amd.com>
Reviewed-by: default avatarChris Park <Chris.Park@amd.com>
Acked-by: default avatarRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 5bf24270

drivers/gpu/drm/amd/display/dc/core/dc_link.c

+4 −0
Original line number Diff line number Diff line
@@ -977,6 +977,10 @@ static bool dc_link_detect_helper(struct dc_link *link, 
		if ((prev_sink != NULL) && ((edid_status == EDID_THE_SAME) || (edid_status == EDID_OK)))

			same_edid = is_same_edid(&prev_sink->dc_edid, &sink->dc_edid);



		if (&sink->edid_caps.panel_patch.skip_scdc_overwrite)

			link->ctx->dc->debug.hdmi20_disable = true;





		if (link->connector_signal == SIGNAL_TYPE_DISPLAY_PORT &&

			sink_caps.transaction_type == DDC_TRANSACTION_TYPE_I2C_OVER_AUX) {

			/*

drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c

+8 −0
Original line number Diff line number Diff line
@@ -686,6 +686,10 @@ void dal_ddc_service_write_scdc_data(struct ddc_service *ddc_service, 
	uint8_t write_buffer[2] = {0};

	/*Lower than 340 Scramble bit from SCDC caps*/



	if (ddc_service->link->local_sink &&

		ddc_service->link->local_sink->edid_caps.panel_patch.skip_scdc_overwrite)

		return;



	dal_ddc_service_query_ddc_data(ddc_service, slave_address, &offset,

			sizeof(offset), &sink_version, sizeof(sink_version));

	if (sink_version == 1) {
@@ -715,6 +719,10 @@ void dal_ddc_service_read_scdc_data(struct ddc_service *ddc_service) 
	uint8_t offset = HDMI_SCDC_TMDS_CONFIG;

	uint8_t tmds_config = 0;



	if (ddc_service->link->local_sink &&

		ddc_service->link->local_sink->edid_caps.panel_patch.skip_scdc_overwrite)

		return;



	dal_ddc_service_query_ddc_data(ddc_service, slave_address, &offset,

			sizeof(offset), &tmds_config, sizeof(tmds_config));

	if (tmds_config & 0x1) {

drivers/gpu/drm/amd/display/dc/dc_types.h

+1 −0
Original line number Diff line number Diff line
@@ -229,6 +229,7 @@ struct dc_panel_patch { 
	unsigned int extra_t12_ms;

	unsigned int extra_delay_backlight_off;

	unsigned int extra_t7_ms;

	unsigned int skip_scdc_overwrite;

};



struct dc_edid_caps {

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c

+5 −0
Original line number Diff line number Diff line
@@ -782,6 +782,11 @@ bool dcn10_link_encoder_validate_output_with_stream( 
	struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc);

	bool is_valid;



	//if SCDC (340-600MHz) is disabled, set to HDMI 1.4 timing limit

	if (stream->sink->edid_caps.panel_patch.skip_scdc_overwrite &&

		enc10->base.features.max_hdmi_pixel_clock > 300000)

		enc10->base.features.max_hdmi_pixel_clock = 300000;



	switch (stream->signal) {

	case SIGNAL_TYPE_DVI_SINGLE_LINK:

	case SIGNAL_TYPE_DVI_DUAL_LINK:

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