microblaze: mm: Flush TLB to ensure correct mapping when higmem ON (a753499d) · Commits · 戴 / test

MMU contains invalid mapping which wasn't flushed and new mapping is using the same addresses as previous one. That's why TLB miss is not happening to get new correct TLB entry and MMU points to incorrect area. This is replicatable when large files(256MB and more) are copied and checked. Signed-off-by:

Michal Simek <michal.simek@xilinx.com>

arch/microblaze/mm/highmem.c

+11 −13

Original line number	Diff line number	Diff line
		@@ -60,6 +60,7 @@ void __kunmap_atomic(void *kvaddr)
		{
		unsigned long vaddr = (unsigned long) kvaddr & PAGE_MASK;
		int type;
		unsigned int idx;

		if (vaddr < __fix_to_virt(FIX_KMAP_END)) {
		pagefault_enable();
		@@ -68,21 +69,18 @@ void __kunmap_atomic(void *kvaddr)
		}

		type = kmap_atomic_idx();
		#ifdef CONFIG_DEBUG_HIGHMEM
		{
		unsigned int idx;

		idx = type + KM_TYPE_NR * smp_processor_id();
		#ifdef CONFIG_DEBUG_HIGHMEM
		BUG_ON(vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx));

		#endif
		/*
		* force other mappings to Oops if they'll try to access
		* this pte without first remap it
		*/
		pte_clear(&init_mm, vaddr, kmap_pte-idx);
		local_flush_tlb_page(NULL, vaddr);
		}
		#endif

		kmap_atomic_idx_pop();
		pagefault_enable();
		preempt_enable();

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