Commit a74e3353 authored by Jayachandran C's avatar Jayachandran C Committed by Ralf Baechle
Browse files

MIPS:Netlogic:Fix section mismatch warnings.



Add __init and __cpuinit annotation to functions that need it.

Signed-off-by: default avatarJayachandran C <jayachandranc@netlogicmicro.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2535/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent b77bb37a
Loading
Loading
Loading
Loading
+2 −2
Original line number Diff line number Diff line
@@ -53,7 +53,7 @@ unsigned long netlogic_io_base = (unsigned long)(DEFAULT_NETLOGIC_IO_BASE);
unsigned long nlm_common_ebase = 0x0;
struct psb_info nlm_prom_info;

static void nlm_early_serial_setup(void)
static void __init nlm_early_serial_setup(void)
{
	struct uart_port s;
	nlm_reg_t *uart_base;
@@ -101,7 +101,7 @@ void __init prom_free_prom_memory(void)
	/* Nothing yet */
}

static void build_arcs_cmdline(int *argv)
static void __init build_arcs_cmdline(int *argv)
{
	int i, remain, len;
	char *arg;
+1 −1
Original line number Diff line number Diff line
@@ -191,7 +191,7 @@ struct plat_smp_ops nlm_smp_ops = {

unsigned long secondary_entry_point;

int nlm_wakeup_secondary_cpus(u32 wakeup_mask)
int __cpuinit nlm_wakeup_secondary_cpus(u32 wakeup_mask)
{
	unsigned int tid, pid, ipi, i, boot_cpu;
	void *reset_vec;
+11 −5
Original line number Diff line number Diff line
@@ -32,17 +32,19 @@
 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#include <linux/init.h>

#include <asm/asm.h>
#include <asm/asm-offsets.h>
#include <asm/regdef.h>
#include <asm/mipsregs.h>


/* Don't jump to linux function from Bootloader stack. Change it
 * here. Kernel might allocate bootloader memory before all the CPUs are
 * brought up (eg: Inode cache region) and we better don't overwrite this
 * memory
/*
 * Early code for secondary CPUs. This will get them out of the bootloader
 * code and into linux. Needed because the bootloader area will be taken
 * and initialized by linux.
 */
	__CPUINIT
NESTED(prom_pre_boot_secondary_cpus, 16, sp)
	.set	mips64
	mfc0	t0, $15, 1	# read ebase
@@ -73,7 +75,11 @@ NESTED(prom_pre_boot_secondary_cpus, 16, sp)
	jr	t0
	nop
END(prom_pre_boot_secondary_cpus)
	__FINIT

/*
 * NMI code, used for CPU wakeup, copied to reset entry
 */
NESTED(nlm_boot_smp_nmi, 0, sp)
	.set push
	.set noat