Commit a7419ff8 authored by Christophe Roullier's avatar Christophe Roullier Committed by Alexandre Torgue
Browse files

ARM: dts: stm32: add support of ethernet on stm32mp157c-ev1



MAC is connected to a PHY in RGMII mode.

Signed-off-by: default avatarChristophe Roullier <christophe.roullier@st.com>
Signed-off-by: default avatarAlexandre Torgue <alexandre.torgue@st.com>
parent 7c045e8b
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+46 −0
Original line number Diff line number Diff line
@@ -157,6 +157,52 @@
				};
			};

			ethernet0_rgmii_pins_a: rgmii-0 {
				pins1 {
					pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
						 <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
						 <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
						 <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
						 <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
						 <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
						 <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */
						 <STM32_PINMUX('A', 2, AF11)>, /* ETH_MDIO */
						 <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
					bias-disable;
					drive-push-pull;
					slew-rate = <3>;
				};
				pins2 {
					pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
						 <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
						 <STM32_PINMUX('B', 0, AF11)>, /* ETH_RGMII_RXD2 */
						 <STM32_PINMUX('B', 1, AF11)>, /* ETH_RGMII_RXD3 */
						 <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
						 <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
					bias-disable;
				};
			};

			ethernet0_rgmii_pins_sleep_a: rgmii-sleep-0 {
				pins1 {
					pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
						 <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
						 <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */
						 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
						 <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
						 <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
						 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
						 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
						 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */
						 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
						 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
						 <STM32_PINMUX('B', 0, ANALOG)>, /* ETH_RGMII_RXD2 */
						 <STM32_PINMUX('B', 1, ANALOG)>, /* ETH_RGMII_RXD3 */
						 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
						 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
				};
			};

			i2c1_pins_a: i2c1-0 {
				pins {
					pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */
+20 −0
Original line number Diff line number Diff line
@@ -17,6 +17,26 @@

	aliases {
		serial0 = &uart4;
		ethernet0 = &ethernet0;
	};
};

&ethernet0 {
	status = "okay";
	pinctrl-0 = <&ethernet0_rgmii_pins_a>;
	pinctrl-1 = <&ethernet0_rgmii_pins_sleep_a>;
	pinctrl-names = "default", "sleep";
	phy-mode = "rgmii";
	max-speed = <1000>;
	phy-handle = <&phy0>;

	mdio0 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "snps,dwmac-mdio";
		phy0: ethernet-phy@0 {
			reg = <0>;
		};
	};
};