Commit a706729c authored by Michal Simek's avatar Michal Simek
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microblaze: Fix GDB issue caused by cache issue 



Used the same solution as SH. Changed len to PAGE_SIZE
in copy_to_user_page macro.

Implement flush_cache_page macro.

Signed-off-by: default avatarMichal Simek <monstr@monstr.eu>
parent cd341577

arch/microblaze/include/asm/cacheflush.h

+9 −3
Original line number Diff line number Diff line
@@ -89,7 +89,9 @@ do { \ 
#define flush_cache_vmap(start, end)			do { } while (0)

#define flush_cache_vunmap(start, end)			do { } while (0)

#define flush_cache_mm(mm)			do { } while (0)

#define flush_cache_page(vma, vmaddr, pfn)	do { } while (0)



#define flush_cache_page(vma, vmaddr, pfn) \

	flush_dcache_range(pfn << PAGE_SHIFT, (pfn << PAGE_SHIFT) + PAGE_SIZE);



/* MS: kgdb code use this macro, wrong len with FLASH */

#if 0
@@ -104,9 +106,13 @@ do { \ 
#define copy_to_user_page(vma, page, vaddr, dst, src, len)		\

do {									\

	u32 addr = virt_to_phys(dst);					\

	invalidate_icache_range((unsigned) (addr), (unsigned) (addr) + (len));\

	memcpy((dst), (src), (len));					\

	flush_dcache_range((unsigned) (addr), (unsigned) (addr) + (len));\

	if (vma->vm_flags & VM_EXEC) {					\

		invalidate_icache_range((unsigned) (addr),		\

					(unsigned) (addr) + PAGE_SIZE);	\

		flush_dcache_range((unsigned) (addr),			\

					(unsigned) (addr) + PAGE_SIZE);	\

	}								\

} while (0)



#define copy_from_user_page(vma, page, vaddr, dst, src, len)		\

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