Commit a6d09440 authored by Anson Huang's avatar Anson Huang Committed by Shawn Guo
Browse files

ARM: dts: imx: Change usdhc node name on i.MX6/i.MX7 SoCs 



Change i.MX6/i.MX7 SoCs usdhc node name from usdhc to mmc to be
compliant with yaml schema, it requires the nodename to be "mmc".

Signed-off-by: default avatarAnson Huang <Anson.Huang@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 7e4cd9d8

arch/arm/boot/dts/imx6qdl.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -1056,7 +1056,7 @@ 
					     <0 126 IRQ_TYPE_LEVEL_HIGH>;

			};



			usdhc1: usdhc@2190000 {

			usdhc1: mmc@2190000 {

				compatible = "fsl,imx6q-usdhc";

				reg = <0x02190000 0x4000>;

				interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>;
@@ -1068,7 +1068,7 @@ 
				status = "disabled";

			};



			usdhc2: usdhc@2194000 {

			usdhc2: mmc@2194000 {

				compatible = "fsl,imx6q-usdhc";

				reg = <0x02194000 0x4000>;

				interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>;
@@ -1080,7 +1080,7 @@ 
				status = "disabled";

			};



			usdhc3: usdhc@2198000 {

			usdhc3: mmc@2198000 {

				compatible = "fsl,imx6q-usdhc";

				reg = <0x02198000 0x4000>;

				interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>;
@@ -1092,7 +1092,7 @@ 
				status = "disabled";

			};



			usdhc4: usdhc@219c000 {

			usdhc4: mmc@219c000 {

				compatible = "fsl,imx6q-usdhc";

				reg = <0x0219c000 0x4000>;

				interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>;

arch/arm/boot/dts/imx6sl.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -854,7 +854,7 @@ 
				status = "disabled";

			};



			usdhc1: usdhc@2190000 {

			usdhc1: mmc@2190000 {

				compatible = "fsl,imx6sl-usdhc", "fsl,imx6q-usdhc";

				reg = <0x02190000 0x4000>;

				interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>;
@@ -866,7 +866,7 @@ 
				status = "disabled";

			};



			usdhc2: usdhc@2194000 {

			usdhc2: mmc@2194000 {

				compatible = "fsl,imx6sl-usdhc", "fsl,imx6q-usdhc";

				reg = <0x02194000 0x4000>;

				interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>;
@@ -878,7 +878,7 @@ 
				status = "disabled";

			};



			usdhc3: usdhc@2198000 {

			usdhc3: mmc@2198000 {

				compatible = "fsl,imx6sl-usdhc", "fsl,imx6q-usdhc";

				reg = <0x02198000 0x4000>;

				interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>;
@@ -890,7 +890,7 @@ 
				status = "disabled";

			};



			usdhc4: usdhc@219c000 {

			usdhc4: mmc@219c000 {

				compatible = "fsl,imx6sl-usdhc", "fsl,imx6q-usdhc";

				reg = <0x0219c000 0x4000>;

				interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>;

arch/arm/boot/dts/imx6sx.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -943,7 +943,7 @@ 
				status = "disabled";

			};



			usdhc1: usdhc@2190000 {

			usdhc1: mmc@2190000 {

				compatible = "fsl,imx6sx-usdhc", "fsl,imx6sl-usdhc";

				reg = <0x02190000 0x4000>;

				interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
@@ -955,7 +955,7 @@ 
				status = "disabled";

			};



			usdhc2: usdhc@2194000 {

			usdhc2: mmc@2194000 {

				compatible = "fsl,imx6sx-usdhc", "fsl,imx6sl-usdhc";

				reg = <0x02194000 0x4000>;

				interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
@@ -967,7 +967,7 @@ 
				status = "disabled";

			};



			usdhc3: usdhc@2198000 {

			usdhc3: mmc@2198000 {

				compatible = "fsl,imx6sx-usdhc", "fsl,imx6sl-usdhc";

				reg = <0x02198000 0x4000>;

				interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
@@ -979,7 +979,7 @@ 
				status = "disabled";

			};



			usdhc4: usdhc@219c000 {

			usdhc4: mmc@219c000 {

				compatible = "fsl,imx6sx-usdhc", "fsl,imx6sl-usdhc";

				reg = <0x0219c000 0x4000>;

				interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;

arch/arm/boot/dts/imx6ul.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -861,7 +861,7 @@ 
				status = "disabled";

			};



			usdhc1: usdhc@2190000 {

			usdhc1: mmc@2190000 {

				compatible = "fsl,imx6ul-usdhc", "fsl,imx6sx-usdhc";

				reg = <0x02190000 0x4000>;

				interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
@@ -875,7 +875,7 @@ 
				status = "disabled";

			};



			usdhc2: usdhc@2194000 {

			usdhc2: mmc@2194000 {

				compatible = "fsl,imx6ul-usdhc", "fsl,imx6sx-usdhc";

				reg = <0x02194000 0x4000>;

				interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;

arch/arm/boot/dts/imx7s.dtsi

+3 −3
Original line number Diff line number Diff line
@@ -1126,7 +1126,7 @@ 
				reg = <0x30b30200 0x200>;

			};



			usdhc1: usdhc@30b40000 {

			usdhc1: mmc@30b40000 {

				compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc";

				reg = <0x30b40000 0x10000>;

				interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
@@ -1138,7 +1138,7 @@ 
				status = "disabled";

			};



			usdhc2: usdhc@30b50000 {

			usdhc2: mmc@30b50000 {

				compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc";

				reg = <0x30b50000 0x10000>;

				interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
@@ -1150,7 +1150,7 @@ 
				status = "disabled";

			};



			usdhc3: usdhc@30b60000 {

			usdhc3: mmc@30b60000 {

				compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc";

				reg = <0x30b60000 0x10000>;

				interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;

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