Commit a656622a authored by Fabio Estevam's avatar Fabio Estevam Committed by Shawn Guo
Browse files

arm64: dts: imx8mm: Move usbphy out of soc node 



usbphy nodes do not have any register properties and thus
shouldn't be placed inside the bus.

Move usbphy nodes from soc node to root node in order to fix
the following build warnings with W=1:

arch/arm64/boot/dts/freescale/imx8mm.dtsi:681.27-687.6: Warning (simple_bus_reg): /soc/bus@32c00000/usbphynop1: missing or empty reg/ranges property
arch/arm64/boot/dts/freescale/imx8mm.dtsi:710.27-716.6: Warning (simple_bus_reg): /soc/bus@32c00000/usbphynop2: missing or empty reg/ranges property

Signed-off-by: default avatarFabio Estevam <festevam@gmail.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 10c74207

arch/arm64/boot/dts/freescale/imx8mm.dtsi

+16 −16
Original line number Diff line number Diff line
@@ -200,6 +200,22 @@ 
		arm,no-tick-in-suspend;

	};



	usbphynop1: usbphynop1 {

		compatible = "usb-nop-xceiv";

		clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;

		assigned-clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;

		assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_100M>;

		clock-names = "main_clk";

	};



	usbphynop2: usbphynop2 {

		compatible = "usb-nop-xceiv";

		clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;

		assigned-clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;

		assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_100M>;

		clock-names = "main_clk";

	};



	soc@0 {

		compatible = "simple-bus";

		#address-cells = <1>;
@@ -737,14 +753,6 @@ 
				status = "disabled";

			};



			usbphynop1: usbphynop1 {

				compatible = "usb-nop-xceiv";

				clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;

				assigned-clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;

				assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_100M>;

				clock-names = "main_clk";

			};



			usbmisc1: usbmisc@32e40200 {

				compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc";

				#index-cells = <1>;
@@ -766,14 +774,6 @@ 
				status = "disabled";

			};



			usbphynop2: usbphynop2 {

				compatible = "usb-nop-xceiv";

				clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;

				assigned-clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;

				assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_100M>;

				clock-names = "main_clk";

			};



			usbmisc2: usbmisc@32e50200 {

				compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc";

				#index-cells = <1>;

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