Commit a63ecd83 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge master.kernel.org:/home/rmk/linux-2.6-arm 

* master.kernel.org:/home/rmk/linux-2.6-arm:
  cyber2000fb: fix console in truecolor modes
  cyber2000fb: fix machine hang on module load
  SA1111: Eliminate use after free
  ARM: Fix Versatile/Realview/VExpress MMC card detection sense
  ARM: 6279/1: highmem: fix SMP preemption bug in kmap_high_l1_vipt
  ARM: Add barriers to io{read,write}{8,16,32} accessors as well
  ARM: 6273/1: Add barriers to the I/O accessors if ARM_DMA_MEM_BUFFERABLE
  ARM: 6272/1: Convert L2x0 to use the IO relaxed operations
  ARM: 6271/1: Introduce *_relaxed() I/O accessors
  ARM: 6275/1: ux500: don't use writeb() in uncompress.h
  ARM: 6270/1: clean files in arch/arm/boot/compressed/
  ARM: Fix csum_partial_copy_from_user()
parents fc71ff8a e76df4d3

arch/arm/boot/compressed/Makefile

+3 −0
Original line number Diff line number Diff line
@@ -71,6 +71,9 @@ targets := vmlinux vmlinux.lds \ 
		 piggy.$(suffix_y) piggy.$(suffix_y).o \

		 font.o font.c head.o misc.o $(OBJS)



# Make sure files are removed during clean

extra-y       += piggy.gzip piggy.lzo piggy.lzma lib1funcs.S



ifeq ($(CONFIG_FUNCTION_TRACER),y)

ORIG_CFLAGS := $(KBUILD_CFLAGS)

KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS))

arch/arm/common/sa1111.c

+2 −3
Original line number Diff line number Diff line
@@ -1028,13 +1028,12 @@ static int sa1111_remove(struct platform_device *pdev) 
	struct sa1111 *sachip = platform_get_drvdata(pdev);



	if (sachip) {

		__sa1111_remove(sachip);

		platform_set_drvdata(pdev, NULL);



#ifdef CONFIG_PM

		kfree(sachip->saved_state);

		sachip->saved_state = NULL;

#endif

		__sa1111_remove(sachip);

		platform_set_drvdata(pdev, NULL);

	}



	return 0;

arch/arm/include/asm/io.h

+32 −18
Original line number Diff line number Diff line
@@ -26,6 +26,7 @@ 
#include <linux/types.h>

#include <asm/byteorder.h>

#include <asm/memory.h>

#include <asm/system.h>



/*

 * ISA I/O bus memory addresses are 1:1 with the physical address.
@@ -179,25 +180,38 @@ extern void _memset_io(volatile void __iomem *, int, size_t); 
 * IO port primitives for more information.

 */

#ifdef __mem_pci

#define readb(c) ({ __u8  __v = __raw_readb(__mem_pci(c)); __v; })

#define readw(c) ({ __u16 __v = le16_to_cpu((__force __le16) \

#define readb_relaxed(c) ({ u8  __v = __raw_readb(__mem_pci(c)); __v; })

#define readw_relaxed(c) ({ u16 __v = le16_to_cpu((__force __le16) \

					__raw_readw(__mem_pci(c))); __v; })

#define readl(c) ({ __u32 __v = le32_to_cpu((__force __le32) \

#define readl_relaxed(c) ({ u32 __v = le32_to_cpu((__force __le32) \

					__raw_readl(__mem_pci(c))); __v; })

#define readb_relaxed(addr) readb(addr)

#define readw_relaxed(addr) readw(addr)

#define readl_relaxed(addr) readl(addr)



#define writeb_relaxed(v,c)	((void)__raw_writeb(v,__mem_pci(c)))

#define writew_relaxed(v,c)	((void)__raw_writew((__force u16) \

					cpu_to_le16(v),__mem_pci(c)))

#define writel_relaxed(v,c)	((void)__raw_writel((__force u32) \

					cpu_to_le32(v),__mem_pci(c)))



#ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE

#define __iormb()		rmb()

#define __iowmb()		wmb()

#else

#define __iormb()		do { } while (0)

#define __iowmb()		do { } while (0)

#endif



#define readb(c)		({ u8  __v = readb_relaxed(c); __iormb(); __v; })

#define readw(c)		({ u16 __v = readw_relaxed(c); __iormb(); __v; })

#define readl(c)		({ u32 __v = readl_relaxed(c); __iormb(); __v; })



#define writeb(v,c)		({ __iowmb(); writeb_relaxed(v,c); })

#define writew(v,c)		({ __iowmb(); writew_relaxed(v,c); })

#define writel(v,c)		({ __iowmb(); writel_relaxed(v,c); })



#define readsb(p,d,l)		__raw_readsb(__mem_pci(p),d,l)

#define readsw(p,d,l)		__raw_readsw(__mem_pci(p),d,l)

#define readsl(p,d,l)		__raw_readsl(__mem_pci(p),d,l)



#define writeb(v,c)		__raw_writeb(v,__mem_pci(c))

#define writew(v,c)		__raw_writew((__force __u16) \

					cpu_to_le16(v),__mem_pci(c))

#define writel(v,c)		__raw_writel((__force __u32) \

					cpu_to_le32(v),__mem_pci(c))



#define writesb(p,d,l)		__raw_writesb(__mem_pci(p),d,l)

#define writesw(p,d,l)		__raw_writesw(__mem_pci(p),d,l)

#define writesl(p,d,l)		__raw_writesl(__mem_pci(p),d,l)
@@ -244,13 +258,13 @@ extern void _memset_io(volatile void __iomem *, int, size_t); 
 * io{read,write}{8,16,32} macros

 */

#ifndef ioread8

#define ioread8(p)	({ unsigned int __v = __raw_readb(p); __v; })

#define ioread16(p)	({ unsigned int __v = le16_to_cpu((__force __le16)__raw_readw(p)); __v; })

#define ioread32(p)	({ unsigned int __v = le32_to_cpu((__force __le32)__raw_readl(p)); __v; })

#define ioread8(p)	({ unsigned int __v = __raw_readb(p); __iormb(); __v; })

#define ioread16(p)	({ unsigned int __v = le16_to_cpu((__force __le16)__raw_readw(p)); __iormb(); __v; })

#define ioread32(p)	({ unsigned int __v = le32_to_cpu((__force __le32)__raw_readl(p)); __iormb(); __v; })



#define iowrite8(v,p)	__raw_writeb(v, p)

#define iowrite16(v,p)	__raw_writew((__force __u16)cpu_to_le16(v), p)

#define iowrite32(v,p)	__raw_writel((__force __u32)cpu_to_le32(v), p)

#define iowrite8(v,p)	({ __iowmb(); (void)__raw_writeb(v, p); })

#define iowrite16(v,p)	({ __iowmb(); (void)__raw_writew((__force __u16)cpu_to_le16(v), p); })

#define iowrite32(v,p)	({ __iowmb(); (void)__raw_writel((__force __u32)cpu_to_le32(v), p); })



#define ioread8_rep(p,d,c)	__raw_readsb(p,d,c)

#define ioread16_rep(p,d,c)	__raw_readsw(p,d,c)

arch/arm/lib/csumpartialcopyuser.S

+1 −1
Original line number Diff line number Diff line
@@ -71,7 +71,7 @@ 
		.pushsection .fixup,"ax"

		.align	4

9001:		mov	r4, #-EFAULT

		ldr	r5, [fp, #4]		@ *err_ptr

		ldr	r5, [sp, #8*4]		@ *err_ptr

		str	r4, [r5]

		ldmia	sp, {r1, r2}		@ retrieve dst, len

		add	r2, r2, r1

arch/arm/mach-realview/core.c

+1 −1
Original line number Diff line number Diff line
@@ -237,7 +237,7 @@ static unsigned int realview_mmc_status(struct device *dev) 
	else

		mask = 2;



	return !(readl(REALVIEW_SYSMCI) & mask);

	return readl(REALVIEW_SYSMCI) & mask;

}



struct mmci_platform_data realview_mmc0_plat_data = {

CRA Git | Maintained and supported by SUSTech CRA and CCSE