Commit a6359d1e authored by Thomas Gleixner's avatar Thomas Gleixner
Browse files

init_task: Replace CONFIG_HAVE_GENERIC_INIT_TASK



Now that all archs except ia64 are converted, replace the config and
let the ia64 select CONFIG_ARCH_INIT_TASK

Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/20120503085035.867948914@linutronix.de
parent e4d59621
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+2 −1
Original line number Diff line number Diff line
@@ -148,7 +148,8 @@ config USE_GENERIC_SMP_HELPERS
config GENERIC_SMP_IDLE_THREAD
       bool

config HAVE_GENERIC_INIT_TASK
# Select if arch init_task initializer is different to init/init_task.c
config ARCH_INIT_TASK
       bool

config HAVE_REGS_AND_STACK_ACCESS_API
+0 −1
Original line number Diff line number Diff line
@@ -16,7 +16,6 @@ config ALPHA
	select ARCH_WANT_OPTIONAL_GPIOLIB
	select ARCH_HAVE_NMI_SAFE_CMPXCHG
	select GENERIC_SMP_IDLE_THREAD
	select HAVE_GENERIC_INIT_TASK
	help
	  The Alpha is a 64-bit general-purpose processor designed and
	  marketed by the Digital Equipment Corporation of blessed memory,
+0 −1
Original line number Diff line number Diff line
@@ -35,7 +35,6 @@ config ARM
	select GENERIC_PCI_IOMAP
	select HAVE_BPF_JIT if NET
	select GENERIC_SMP_IDLE_THREAD
	select HAVE_GENERIC_INIT_TASK
	help
	  The ARM series is a line of low-power-consumption RISC chip designs
	  licensed by ARM Ltd and targeted at embedded applications and
+0 −1
Original line number Diff line number Diff line
@@ -12,7 +12,6 @@ config AVR32
	select HARDIRQS_SW_RESEND
	select GENERIC_IRQ_SHOW
	select ARCH_HAVE_NMI_SAFE_CMPXCHG
	select HAVE_GENERIC_INIT_TASK
	help
	  AVR32 is a high-performance 32-bit RISC microprocessor core,
	  designed for cost-sensitive embedded applications, with particular
+0 −1
Original line number Diff line number Diff line
@@ -38,7 +38,6 @@ config BLACKFIN
	select IRQ_PER_CPU if SMP
	select HAVE_NMI_WATCHDOG if NMI_WATCHDOG
	select GENERIC_SMP_IDLE_THREAD
	select HAVE_GENERIC_INIT_TASK

config GENERIC_CSUM
	def_bool y
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