Commit a60ddf50 authored Oct 12, 2017 by Geert Uytterhoeven Committed by Simon Horman Oct 16, 2017

ARM: dts: r8a7743: Add missing clock for secondary CA15 CPU core



Currently only the primary CPU in the CA15 cluster has a clocks
property, while the secondary CPU core is driven by the same clock.
Add the missing clocks property to fix this.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Chris Paterson <chris.paterson2@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

parent a7869a5b

arch/arm/boot/dts/r8a7743.dtsi

+1 −0

Original line number	Diff line number	Diff line
		@@ -63,6 +63,7 @@
		compatible = "arm,cortex-a15";
		reg = <1>;
		clock-frequency = <1500000000>;
		clocks = <&cpg CPG_CORE R8A7743_CLK_Z>;
		power-domains = <&sysc R8A7743_PD_CA15_CPU1>;
		next-level-cache = <&L2_CA15>;
		};

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