Merge branch 'v3.9-samsung-fixes-1' of... (a5e99028) · Commits · 戴 / test

arch/arm/boot/dts/exynos4.dtsi

+9 −0

Original line number	Diff line number	Diff line
		@@ -275,18 +275,27 @@
		compatible = "arm,pl330", "arm,primecell";
		reg = <0x12680000 0x1000>;
		interrupts = <0 35 0>;
		#dma-cells = <1>;
		#dma-channels = <8>;
		#dma-requests = <32>;
		};

		pdma1: pdma@12690000 {
		compatible = "arm,pl330", "arm,primecell";
		reg = <0x12690000 0x1000>;
		interrupts = <0 36 0>;
		#dma-cells = <1>;
		#dma-channels = <8>;
		#dma-requests = <32>;
		};

		mdma1: mdma@12850000 {
		compatible = "arm,pl330", "arm,primecell";
		reg = <0x12850000 0x1000>;
		interrupts = <0 34 0>;
		#dma-cells = <1>;
		#dma-channels = <8>;
		#dma-requests = <1>;
		};
		};
		};

arch/arm/boot/dts/exynos5440.dtsi

+6 −0

Original line number	Diff line number	Diff line
		@@ -142,12 +142,18 @@
		compatible = "arm,pl330", "arm,primecell";
		reg = <0x120000 0x1000>;
		interrupts = <0 34 0>;
		#dma-cells = <1>;
		#dma-channels = <8>;
		#dma-requests = <32>;
		};

		pdma1: pdma@121B0000 {
		compatible = "arm,pl330", "arm,primecell";
		reg = <0x121000 0x1000>;
		interrupts = <0 35 0>;
		#dma-cells = <1>;
		#dma-channels = <8>;
		#dma-requests = <32>;
		};
		};

arch/arm/mach-s5pv210/clock.c

+18 −18

Original line number	Diff line number	Diff line
		@@ -214,11 +214,6 @@ static struct clk clk_pcmcdclk2 = {
		.name = "pcmcdclk",
		};

		static struct clk dummy_apb_pclk = {
		.name = "apb_pclk",
		.id = -1,
		};

		static struct clk *clkset_vpllsrc_list[] = {
		[0] = &clk_fin_vpll,
		[1] = &clk_sclk_hdmi27m,
		@@ -305,18 +300,6 @@ static struct clk_ops clk_fout_apll_ops = {

		static struct clk init_clocks_off[] = {
		{
		.name = "dma",
		.devname = "dma-pl330.0",
		.parent = &clk_hclk_psys.clk,
		.enable = s5pv210_clk_ip0_ctrl,
		.ctrlbit = (1 << 3),
		}, {
		.name = "dma",
		.devname = "dma-pl330.1",
		.parent = &clk_hclk_psys.clk,
		.enable = s5pv210_clk_ip0_ctrl,
		.ctrlbit = (1 << 4),
		}, {
		.name = "rot",
		.parent = &clk_hclk_dsys.clk,
		.enable = s5pv210_clk_ip0_ctrl,
		@@ -573,6 +556,20 @@ static struct clk clk_hsmmc3 = {
		.ctrlbit = (1<<19),
		};

		static struct clk clk_pdma0 = {
		.name = "pdma0",
		.parent = &clk_hclk_psys.clk,
		.enable = s5pv210_clk_ip0_ctrl,
		.ctrlbit = (1 << 3),
		};

		static struct clk clk_pdma1 = {
		.name = "pdma1",
		.parent = &clk_hclk_psys.clk,
		.enable = s5pv210_clk_ip0_ctrl,
		.ctrlbit = (1 << 4),
		};

		static struct clk *clkset_uart_list[] = {
		[6] = &clk_mout_mpll.clk,
		[7] = &clk_mout_epll.clk,
		@@ -1075,6 +1072,8 @@ static struct clk *clk_cdev[] = {
		&clk_hsmmc1,
		&clk_hsmmc2,
		&clk_hsmmc3,
		&clk_pdma0,
		&clk_pdma1,
		};

		/* Clock initialisation code */
		@@ -1333,6 +1332,8 @@ static struct clk_lookup s5pv210_clk_lookup[] = {
		CLKDEV_INIT(NULL, "spi_busclk0", &clk_p),
		CLKDEV_INIT("s5pv210-spi.0", "spi_busclk1", &clk_sclk_spi0.clk),
		CLKDEV_INIT("s5pv210-spi.1", "spi_busclk1", &clk_sclk_spi1.clk),
		CLKDEV_INIT("dma-pl330.0", "apb_pclk", &clk_pdma0),
		CLKDEV_INIT("dma-pl330.1", "apb_pclk", &clk_pdma1),
		};

		void __init s5pv210_register_clocks(void)
		@@ -1361,6 +1362,5 @@ void __init s5pv210_register_clocks(void)
		for (ptr = 0; ptr < ARRAY_SIZE(clk_cdev); ptr++)
		s3c_disable_clocks(clk_cdev[ptr], 1);

		s3c24xx_register_clock(&dummy_apb_pclk);
		s3c_pwmclk_init();
		}

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