Commit a5e8b53a authored by Lad Prabhakar's avatar Lad Prabhakar Committed by Geert Uytterhoeven
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pinctrl: sh-pfc: pfc-r8a77951: Add R8A774E1 PFC support 



Renesas RZ/G2H (r8a774e1) is pin compatible with R-Car H3 (R8A77951),
however it doesn't have several automotive specific peripherals. Add
automotive-specific pin groups/functions along with common pin
groups/functions for supporting both r8a77951 and r8a774e1 SoC.

Signed-off-by: default avatarLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594138692-16816-13-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent d33cfc2e

drivers/pinctrl/sh-pfc/Kconfig

+4 −0
Original line number Diff line number Diff line
@@ -20,6 +20,7 @@ config PINCTRL_SH_PFC 
	select PINCTRL_PFC_R8A774A1 if ARCH_R8A774A1

	select PINCTRL_PFC_R8A774B1 if ARCH_R8A774B1

	select PINCTRL_PFC_R8A774C0 if ARCH_R8A774C0

	select PINCTRL_PFC_R8A774E1 if ARCH_R8A774E1

	select PINCTRL_PFC_R8A7778 if ARCH_R8A7778

	select PINCTRL_PFC_R8A7779 if ARCH_R8A7779

	select PINCTRL_PFC_R8A7790 if ARCH_R8A7790
@@ -99,6 +100,9 @@ config PINCTRL_PFC_R8A774B1 
config PINCTRL_PFC_R8A774C0

	bool "RZ/G2E pin control support" if COMPILE_TEST



config PINCTRL_PFC_R8A774E1

	bool "RZ/G2H pin control support" if COMPILE_TEST



config PINCTRL_PFC_R8A7778

	bool "R-Car M1A pin control support" if COMPILE_TEST

drivers/pinctrl/sh-pfc/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -12,6 +12,7 @@ obj-$(CONFIG_PINCTRL_PFC_R8A77470) += pfc-r8a77470.o 
obj-$(CONFIG_PINCTRL_PFC_R8A774A1)	+= pfc-r8a7796.o

obj-$(CONFIG_PINCTRL_PFC_R8A774B1)	+= pfc-r8a77965.o

obj-$(CONFIG_PINCTRL_PFC_R8A774C0)	+= pfc-r8a77990.o

obj-$(CONFIG_PINCTRL_PFC_R8A774E1)	+= pfc-r8a77951.o

obj-$(CONFIG_PINCTRL_PFC_R8A7778)	+= pfc-r8a7778.o

obj-$(CONFIG_PINCTRL_PFC_R8A7779)	+= pfc-r8a7779.o

obj-$(CONFIG_PINCTRL_PFC_R8A7790)	+= pfc-r8a7790.o

drivers/pinctrl/sh-pfc/core.c

+6 −0
Original line number Diff line number Diff line
@@ -533,6 +533,12 @@ static const struct of_device_id sh_pfc_of_table[] = { 
		.data = &r8a774c0_pinmux_info,

	},

#endif

#ifdef CONFIG_PINCTRL_PFC_R8A774E1

	{

		.compatible = "renesas,pfc-r8a774e1",

		.data = &r8a774e1_pinmux_info,

	},

#endif

#ifdef CONFIG_PINCTRL_PFC_R8A7778

	{

		.compatible = "renesas,pfc-r8a7778",

drivers/pinctrl/sh-pfc/pfc-r8a77951.c

+462 −415
Original line number Diff line number Diff line
@@ -4157,7 +4157,11 @@ static const unsigned int vin5_clk_mux[] = { 
	VI5_CLK_MARK,

};



static const struct sh_pfc_pin_group pinmux_groups[] = {

static const struct {

	struct sh_pfc_pin_group common[320];

	struct sh_pfc_pin_group automotive[30];

} pinmux_groups = {

	.common = {

		SH_PFC_PIN_GROUP(audio_clk_a_a),

		SH_PFC_PIN_GROUP(audio_clk_a_b),

		SH_PFC_PIN_GROUP(audio_clk_a_c),
@@ -4193,36 +4197,6 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { 
		SH_PFC_PIN_GROUP(canfd0_data_a),

		SH_PFC_PIN_GROUP(canfd0_data_b),

		SH_PFC_PIN_GROUP(canfd1_data),

	SH_PFC_PIN_GROUP(drif0_ctrl_a),

	SH_PFC_PIN_GROUP(drif0_data0_a),

	SH_PFC_PIN_GROUP(drif0_data1_a),

	SH_PFC_PIN_GROUP(drif0_ctrl_b),

	SH_PFC_PIN_GROUP(drif0_data0_b),

	SH_PFC_PIN_GROUP(drif0_data1_b),

	SH_PFC_PIN_GROUP(drif0_ctrl_c),

	SH_PFC_PIN_GROUP(drif0_data0_c),

	SH_PFC_PIN_GROUP(drif0_data1_c),

	SH_PFC_PIN_GROUP(drif1_ctrl_a),

	SH_PFC_PIN_GROUP(drif1_data0_a),

	SH_PFC_PIN_GROUP(drif1_data1_a),

	SH_PFC_PIN_GROUP(drif1_ctrl_b),

	SH_PFC_PIN_GROUP(drif1_data0_b),

	SH_PFC_PIN_GROUP(drif1_data1_b),

	SH_PFC_PIN_GROUP(drif1_ctrl_c),

	SH_PFC_PIN_GROUP(drif1_data0_c),

	SH_PFC_PIN_GROUP(drif1_data1_c),

	SH_PFC_PIN_GROUP(drif2_ctrl_a),

	SH_PFC_PIN_GROUP(drif2_data0_a),

	SH_PFC_PIN_GROUP(drif2_data1_a),

	SH_PFC_PIN_GROUP(drif2_ctrl_b),

	SH_PFC_PIN_GROUP(drif2_data0_b),

	SH_PFC_PIN_GROUP(drif2_data1_b),

	SH_PFC_PIN_GROUP(drif3_ctrl_a),

	SH_PFC_PIN_GROUP(drif3_data0_a),

	SH_PFC_PIN_GROUP(drif3_data1_a),

	SH_PFC_PIN_GROUP(drif3_ctrl_b),

	SH_PFC_PIN_GROUP(drif3_data0_b),

	SH_PFC_PIN_GROUP(drif3_data1_b),

		SH_PFC_PIN_GROUP(du_rgb666),

		SH_PFC_PIN_GROUP(du_rgb888),

		SH_PFC_PIN_GROUP(du_clk_out_0),
@@ -4508,6 +4482,40 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { 
		SH_PFC_PIN_GROUP(vin5_field),

		SH_PFC_PIN_GROUP(vin5_clkenb),

		SH_PFC_PIN_GROUP(vin5_clk),

	},

	.automotive = {

		SH_PFC_PIN_GROUP(drif0_ctrl_a),

		SH_PFC_PIN_GROUP(drif0_data0_a),

		SH_PFC_PIN_GROUP(drif0_data1_a),

		SH_PFC_PIN_GROUP(drif0_ctrl_b),

		SH_PFC_PIN_GROUP(drif0_data0_b),

		SH_PFC_PIN_GROUP(drif0_data1_b),

		SH_PFC_PIN_GROUP(drif0_ctrl_c),

		SH_PFC_PIN_GROUP(drif0_data0_c),

		SH_PFC_PIN_GROUP(drif0_data1_c),

		SH_PFC_PIN_GROUP(drif1_ctrl_a),

		SH_PFC_PIN_GROUP(drif1_data0_a),

		SH_PFC_PIN_GROUP(drif1_data1_a),

		SH_PFC_PIN_GROUP(drif1_ctrl_b),

		SH_PFC_PIN_GROUP(drif1_data0_b),

		SH_PFC_PIN_GROUP(drif1_data1_b),

		SH_PFC_PIN_GROUP(drif1_ctrl_c),

		SH_PFC_PIN_GROUP(drif1_data0_c),

		SH_PFC_PIN_GROUP(drif1_data1_c),

		SH_PFC_PIN_GROUP(drif2_ctrl_a),

		SH_PFC_PIN_GROUP(drif2_data0_a),

		SH_PFC_PIN_GROUP(drif2_data1_a),

		SH_PFC_PIN_GROUP(drif2_ctrl_b),

		SH_PFC_PIN_GROUP(drif2_data0_b),

		SH_PFC_PIN_GROUP(drif2_data1_b),

		SH_PFC_PIN_GROUP(drif3_ctrl_a),

		SH_PFC_PIN_GROUP(drif3_data0_a),

		SH_PFC_PIN_GROUP(drif3_data1_a),

		SH_PFC_PIN_GROUP(drif3_ctrl_b),

		SH_PFC_PIN_GROUP(drif3_data0_b),

		SH_PFC_PIN_GROUP(drif3_data1_b),

	}



};



static const char * const audio_clk_groups[] = {
@@ -5031,7 +5039,11 @@ static const char * const vin5_groups[] = { 
	"vin5_clk",

};



static const struct sh_pfc_function pinmux_functions[] = {

static const struct {

	struct sh_pfc_function common[53];

	struct sh_pfc_function automotive[4];

} pinmux_functions = {

	.common = {

		SH_PFC_FUNCTION(audio_clk),

		SH_PFC_FUNCTION(avb),

		SH_PFC_FUNCTION(can0),
@@ -5039,10 +5051,6 @@ static const struct sh_pfc_function pinmux_functions[] = { 
		SH_PFC_FUNCTION(can_clk),

		SH_PFC_FUNCTION(canfd0),

		SH_PFC_FUNCTION(canfd1),

	SH_PFC_FUNCTION(drif0),

	SH_PFC_FUNCTION(drif1),

	SH_PFC_FUNCTION(drif2),

	SH_PFC_FUNCTION(drif3),

		SH_PFC_FUNCTION(du),

		SH_PFC_FUNCTION(hscif0),

		SH_PFC_FUNCTION(hscif1),
@@ -5089,6 +5097,14 @@ static const struct sh_pfc_function pinmux_functions[] = { 
		SH_PFC_FUNCTION(usb30),

		SH_PFC_FUNCTION(vin4),

		SH_PFC_FUNCTION(vin5),

	},

	.automotive = {

		SH_PFC_FUNCTION(drif0),

		SH_PFC_FUNCTION(drif1),

		SH_PFC_FUNCTION(drif2),

		SH_PFC_FUNCTION(drif3),

	}



};



static const struct pinmux_cfg_reg pinmux_config_regs[] = {
@@ -5777,7 +5793,9 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = { 
		{ PIN_DU_DOTCLKIN1,    0, 2 },	/* DU_DOTCLKIN1 */

	} },

	{ PINMUX_DRIVE_REG("DRVCTRL12", 0xe6060330) {

#ifdef CONFIG_PINCTRL_PFC_R8A77951

		{ PIN_DU_DOTCLKIN2,   28, 2 },	/* DU_DOTCLKIN2 */

#endif

		{ PIN_DU_DOTCLKIN3,   24, 2 },	/* DU_DOTCLKIN3 */

		{ PIN_FSCLKST_N,      20, 2 },	/* FSCLKST# */

		{ PIN_TMS,             4, 2 },	/* TMS */
@@ -5898,8 +5916,8 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = { 
		{ RCAR_GP_PIN(6, 27), 20, 3 },	/* USB1_OVC */

		{ RCAR_GP_PIN(6, 28), 16, 3 },	/* USB30_PWEN */

		{ RCAR_GP_PIN(6, 29), 12, 3 },	/* USB30_OVC */

		{ RCAR_GP_PIN(6, 30),  8, 3 },	/* USB2_CH3_PWEN */

		{ RCAR_GP_PIN(6, 31),  4, 3 },	/* USB2_CH3_OVC */

		{ RCAR_GP_PIN(6, 30),  8, 3 },	/* GP6_30/USB2_CH3_PWEN */

		{ RCAR_GP_PIN(6, 31),  4, 3 },	/* GP6_31/USB2_CH3_OVC */

	} },

	{ },

};
@@ -6220,6 +6238,32 @@ static const struct sh_pfc_soc_operations r8a77951_pinmux_ops = { 
	.set_bias = r8a77951_pinmux_set_bias,

};



#ifdef CONFIG_PINCTRL_PFC_R8A774E1

const struct sh_pfc_soc_info r8a774e1_pinmux_info = {

	.name = "r8a774e1_pfc",

	.ops = &r8a77951_pinmux_ops,

	.unlock_reg = 0xe6060000, /* PMMR */



	.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },



	.pins = pinmux_pins,

	.nr_pins = ARRAY_SIZE(pinmux_pins),

	.groups = pinmux_groups.common,

	.nr_groups = ARRAY_SIZE(pinmux_groups.common),

	.functions = pinmux_functions.common,

	.nr_functions = ARRAY_SIZE(pinmux_functions.common),



	.cfg_regs = pinmux_config_regs,

	.drive_regs = pinmux_drive_regs,

	.bias_regs = pinmux_bias_regs,

	.ioctrl_regs = pinmux_ioctrl_regs,



	.pinmux_data = pinmux_data,

	.pinmux_data_size = ARRAY_SIZE(pinmux_data),

};

#endif



#ifdef CONFIG_PINCTRL_PFC_R8A77951

const struct sh_pfc_soc_info r8a77951_pinmux_info = {

	.name = "r8a77951_pfc",

	.ops = &r8a77951_pinmux_ops,
@@ -6229,10 +6273,12 @@ const struct sh_pfc_soc_info r8a77951_pinmux_info = { 


	.pins = pinmux_pins,

	.nr_pins = ARRAY_SIZE(pinmux_pins),

	.groups = pinmux_groups,

	.nr_groups = ARRAY_SIZE(pinmux_groups),

	.functions = pinmux_functions,

	.nr_functions = ARRAY_SIZE(pinmux_functions),

	.groups = pinmux_groups.common,

	.nr_groups = ARRAY_SIZE(pinmux_groups.common) +

			ARRAY_SIZE(pinmux_groups.automotive),

	.functions = pinmux_functions.common,

	.nr_functions = ARRAY_SIZE(pinmux_functions.common) +

			ARRAY_SIZE(pinmux_functions.automotive),



	.cfg_regs = pinmux_config_regs,

	.drive_regs = pinmux_drive_regs,
@@ -6242,3 +6288,4 @@ const struct sh_pfc_soc_info r8a77951_pinmux_info = { 
	.pinmux_data = pinmux_data,

	.pinmux_data_size = ARRAY_SIZE(pinmux_data),

};

#endif

drivers/pinctrl/sh-pfc/sh_pfc.h

+1 −0
Original line number Diff line number Diff line
@@ -312,6 +312,7 @@ extern const struct sh_pfc_soc_info r8a77470_pinmux_info; 
extern const struct sh_pfc_soc_info r8a774a1_pinmux_info;

extern const struct sh_pfc_soc_info r8a774b1_pinmux_info;

extern const struct sh_pfc_soc_info r8a774c0_pinmux_info;

extern const struct sh_pfc_soc_info r8a774e1_pinmux_info;

extern const struct sh_pfc_soc_info r8a7778_pinmux_info;

extern const struct sh_pfc_soc_info r8a7779_pinmux_info;

extern const struct sh_pfc_soc_info r8a7790_pinmux_info;

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