ARM: OMAP4: Add McBSP support (a5b92cc3) · Commits · 戴 / test

arch/arm/mach-omap2/mcbsp.c

+41 −0

Original line number	Diff line number	Diff line
		@@ -169,6 +169,42 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
		#define OMAP34XX_MCBSP_PDATA_SZ 0
		#endif

		static struct omap_mcbsp_platform_data omap44xx_mcbsp_pdata[] = {
		{
		.phys_base = OMAP44XX_MCBSP1_BASE,
		.dma_rx_sync = OMAP44XX_DMA_MCBSP1_RX,
		.dma_tx_sync = OMAP44XX_DMA_MCBSP1_TX,
		.rx_irq = INT_24XX_MCBSP1_IRQ_RX,
		.tx_irq = INT_24XX_MCBSP1_IRQ_TX,
		.ops = &omap2_mcbsp_ops,
		},
		{
		.phys_base = OMAP44XX_MCBSP2_BASE,
		.dma_rx_sync = OMAP44XX_DMA_MCBSP2_RX,
		.dma_tx_sync = OMAP44XX_DMA_MCBSP2_TX,
		.rx_irq = INT_24XX_MCBSP2_IRQ_RX,
		.tx_irq = INT_24XX_MCBSP2_IRQ_TX,
		.ops = &omap2_mcbsp_ops,
		},
		{
		.phys_base = OMAP44XX_MCBSP3_BASE,
		.dma_rx_sync = OMAP44XX_DMA_MCBSP3_RX,
		.dma_tx_sync = OMAP44XX_DMA_MCBSP3_TX,
		.rx_irq = INT_24XX_MCBSP3_IRQ_RX,
		.tx_irq = INT_24XX_MCBSP3_IRQ_TX,
		.ops = &omap2_mcbsp_ops,
		},
		{
		.phys_base = OMAP44XX_MCBSP4_BASE,
		.dma_rx_sync = OMAP44XX_DMA_MCBSP4_RX,
		.dma_tx_sync = OMAP44XX_DMA_MCBSP4_TX,
		.rx_irq = INT_24XX_MCBSP4_IRQ_RX,
		.tx_irq = INT_24XX_MCBSP4_IRQ_TX,
		.ops = &omap2_mcbsp_ops,
		},
		};
		#define OMAP44XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap44xx_mcbsp_pdata)

		static int __init omap2_mcbsp_init(void)
		{
		if (cpu_is_omap2420())
		@@ -177,6 +213,8 @@ static int __init omap2_mcbsp_init(void)
		omap_mcbsp_count = OMAP2430_MCBSP_PDATA_SZ;
		if (cpu_is_omap34xx())
		omap_mcbsp_count = OMAP34XX_MCBSP_PDATA_SZ;
		if (cpu_is_omap44xx())
		omap_mcbsp_count = OMAP44XX_MCBSP_PDATA_SZ;

		mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *),
		GFP_KERNEL);
		@@ -192,6 +230,9 @@ static int __init omap2_mcbsp_init(void)
		if (cpu_is_omap34xx())
		omap_mcbsp_register_board_cfg(omap34xx_mcbsp_pdata,
		OMAP34XX_MCBSP_PDATA_SZ);
		if (cpu_is_omap44xx())
		omap_mcbsp_register_board_cfg(omap44xx_mcbsp_pdata,
		OMAP44XX_MCBSP_PDATA_SZ);

		return omap_mcbsp_init();
		}

arch/arm/plat-omap/include/mach/mcbsp.h

+7 −1

Original line number	Diff line number	Diff line
		@@ -53,6 +53,11 @@
		#define OMAP34XX_MCBSP4_BASE 0x49026000
		#define OMAP34XX_MCBSP5_BASE 0x48096000

		#define OMAP44XX_MCBSP1_BASE 0x49022000
		#define OMAP44XX_MCBSP2_BASE 0x49024000
		#define OMAP44XX_MCBSP3_BASE 0x49026000
		#define OMAP44XX_MCBSP4_BASE 0x48074000

		#if defined(CONFIG_ARCH_OMAP15XX) \|\| defined(CONFIG_ARCH_OMAP16XX) \|\| defined(CONFIG_ARCH_OMAP730)

		#define OMAP_MCBSP_REG_DRR2 0x00
		@@ -98,7 +103,8 @@
		#define AUDIO_DMA_TX OMAP_DMA_MCBSP1_TX
		#define AUDIO_DMA_RX OMAP_DMA_MCBSP1_RX

		#elif defined(CONFIG_ARCH_OMAP24XX) \|\| defined(CONFIG_ARCH_OMAP34XX)
		#elif defined(CONFIG_ARCH_OMAP24XX) \|\| defined(CONFIG_ARCH_OMAP34XX) \|\| \
		defined(CONFIG_ARCH_OMAP4)

		#define OMAP_MCBSP_REG_DRR2 0x00
		#define OMAP_MCBSP_REG_DRR1 0x04

arch/arm/plat-omap/mcbsp.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -191,7 +191,7 @@ void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg *config)
		OMAP_MCBSP_WRITE(io_base, MCR2, config->mcr2);
		OMAP_MCBSP_WRITE(io_base, MCR1, config->mcr1);
		OMAP_MCBSP_WRITE(io_base, PCR0, config->pcr0);
		if (cpu_is_omap2430() \|\| cpu_is_omap34xx()) {
		if (cpu_is_omap2430() \|\| cpu_is_omap34xx() \|\| cpu_is_omap44xx()) {
		OMAP_MCBSP_WRITE(io_base, XCCR, config->xccr);
		OMAP_MCBSP_WRITE(io_base, RCCR, config->rccr);
		}

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