drm/i915: Show stack (by WARN) for hitting forcewake errors (a5b22b5e) · Commits · 戴 / test

On Sandybridge, we need a workaround to wait for the CPU thread to wake up before we are sure that we have enabled the GT power well. However, we do see the errors being reported and failed reads returning spurious results. To try and capture more details as it fails, promote the error into a WARN so we grab the stacktrace, and to try and reduce the frequency of error increase the timeout from 500us to 5ms. Signed-off-by:

Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by:

Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180720111102.11549-1-chris@chris-wilson.co.uk

drivers/gpu/drm/i915/intel_uncore.c

+14 −4

Original line number	Diff line number	Diff line
		@@ -283,14 +283,24 @@ fw_domains_reset(struct drm_i915_private *i915,
		fw_domain_reset(i915, d);
		}

		static inline u32 gt_thread_status(struct drm_i915_private *dev_priv)
		{
		u32 val;

		val = __raw_i915_read32(dev_priv, GEN6_GT_THREAD_STATUS_REG);
		val &= GEN6_GT_THREAD_STATUS_CORE_MASK;

		return val;
		}

		static void __gen6_gt_wait_for_thread_c0(struct drm_i915_private *dev_priv)
		{
		/* w/a for a sporadic read returning 0 by waiting for the GT
		/*
		* w/a for a sporadic read returning 0 by waiting for the GT
		* thread to wake up.
		*/
		if (wait_for_atomic_us((__raw_i915_read32(dev_priv, GEN6_GT_THREAD_STATUS_REG) &
		GEN6_GT_THREAD_STATUS_CORE_MASK) == 0, 500))
		DRM_ERROR("GT thread status wait timed out\n");
		WARN_ONCE(wait_for_atomic_us(gt_thread_status(dev_priv) == 0, 5000),
		"GT thread status wait timed out\n");
		}

		static void fw_domains_get_with_thread_status(struct drm_i915_private *dev_priv,

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