Commit a5627721 authored by Chris Wilson's avatar Chris Wilson
Browse files

drm/i915: Inline engine->init_context into its caller 



We only use the init_context vfunc once while recording the default
context state, and we use the same sequence in each backend (eliding
steps that do not apply). Remove the vfunc for simplicity and
de-duplication.

Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190729113720.24830-1-chris@chris-wilson.co.uk
parent 1032a2af

drivers/gpu/drm/i915/gt/intel_engine_types.h

+0 −1
Original line number Diff line number Diff line
@@ -383,7 +383,6 @@ struct intel_engine_cs { 
	const struct intel_context_ops *cops;



	int		(*request_alloc)(struct i915_request *rq);

	int		(*init_context)(struct i915_request *rq);



	int		(*emit_flush)(struct i915_request *request, u32 mode);

#define EMIT_INVALIDATE	BIT(0)

drivers/gpu/drm/i915/gt/intel_lrc.c

+0 −21
Original line number Diff line number Diff line
@@ -141,7 +141,6 @@ 
#include "intel_gt.h"

#include "intel_lrc_reg.h"

#include "intel_mocs.h"

#include "intel_renderstate.h"

#include "intel_reset.h"

#include "intel_workarounds.h"
@@ -2727,25 +2726,6 @@ static u32 *gen8_emit_fini_breadcrumb_rcs(struct i915_request *request, u32 *cs) 
	return gen8_emit_wa_tail(request, cs);

}



static int gen8_init_rcs_context(struct i915_request *rq)

{

	int ret;



	ret = intel_engine_emit_ctx_wa(rq);

	if (ret)

		return ret;



	ret = intel_rcs_context_init_mocs(rq);

	/*

	 * Failing to program the MOCS is non-fatal.The system will not

	 * run at peak performance. So generate an error and carry on.

	 */

	if (ret)

		DRM_ERROR("MOCS failed to program: expect performance issues.\n");



	return intel_renderstate_emit(rq);

}



static void execlists_park(struct intel_engine_cs *engine)

{

	del_timer_sync(&engine->execlists.timer);
@@ -2853,7 +2833,6 @@ int intel_execlists_submission_setup(struct intel_engine_cs *engine) 
	logical_ring_default_irqs(engine);



	if (engine->class == RENDER_CLASS) {

		engine->init_context = gen8_init_rcs_context;

		engine->emit_flush = gen8_emit_flush_render;

		engine->emit_fini_breadcrumb = gen8_emit_fini_breadcrumb_rcs;

	}

drivers/gpu/drm/i915/gt/intel_mocs.c

+4 −1
Original line number Diff line number Diff line
@@ -568,11 +568,14 @@ void intel_mocs_init_l3cc_table(struct intel_gt *gt) 
 *

 * Return: 0 on success, otherwise the error status.

 */

int intel_rcs_context_init_mocs(struct i915_request *rq)

int intel_mocs_emit(struct i915_request *rq)

{

	struct drm_i915_mocs_table t;

	int ret;



	if (rq->engine->class != RENDER_CLASS)

		return 0;



	if (get_mocs_settings(rq->engine->gt, &t)) {

		/* Program the RCS control registers */

		ret = emit_mocs_control_table(rq, &t);

drivers/gpu/drm/i915/gt/intel_mocs.h

+2 −1
Original line number Diff line number Diff line
@@ -54,8 +54,9 @@ struct i915_request; 
struct intel_engine_cs;

struct intel_gt;



int intel_rcs_context_init_mocs(struct i915_request *rq);

void intel_mocs_init_l3cc_table(struct intel_gt *gt);

void intel_mocs_init_engine(struct intel_engine_cs *engine);



int intel_mocs_emit(struct i915_request *rq);



#endif

drivers/gpu/drm/i915/gt/intel_renderstate.c

+1 −1
Original line number Diff line number Diff line
@@ -41,7 +41,7 @@ struct intel_renderstate { 
static const struct intel_renderstate_rodata *

render_state_get_rodata(const struct intel_engine_cs *engine)

{

	if (engine->id != RCS0)

	if (engine->class != RENDER_CLASS)

		return NULL;



	switch (INTEL_GEN(engine->i915)) {

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