ACPICA: IORT: Add PMCG node supprt (a53eaef6) · Commits · 戴 / test

PMCG nodes were added by IORT revision C, with the unfortunate oversight that it only defined a single base address, and thus was incapable of properly describing PMCG implementations with PMCG_CFGR.RELOC_CTRS = 1, where the counters are in a separate page from the control registers. Revision D corrects this by clarifying the existing field as the page 0 base address and adding a second field to describe the page 1 address when implemented. With the spec now fit for purpose, let's support it. Signed-off-by:

Robin Murphy <robin.murphy@arm.com> Signed-off-by:

Erik Schmauss <erik.schmauss@intel.com> Signed-off-by:

Rafael J. Wysocki <rafael.j.wysocki@intel.com>

include/acpi/actbl2.h

+9 −1

Original line number	Original line	Diff line number	Diff line
	@@ -98,7 +98,8 @@ enum acpi_iort_node_type {
	ACPI_IORT_NODE_NAMED_COMPONENT = 0x01,		ACPI_IORT_NODE_NAMED_COMPONENT = 0x01,
	ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02,		ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02,
	ACPI_IORT_NODE_SMMU = 0x03,		ACPI_IORT_NODE_SMMU = 0x03,
	ACPI_IORT_NODE_SMMU_V3 = 0x04		ACPI_IORT_NODE_SMMU_V3 = 0x04,
			ACPI_IORT_NODE_PMCG = 0x05
	};		};

	struct acpi_iort_id_mapping {		struct acpi_iort_id_mapping {
	@@ -232,6 +233,13 @@ struct acpi_iort_smmu_v3 {
	#define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1)		#define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1)
	#define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3)		#define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3)

			struct acpi_iort_pmcg {
			u64 page0_base_address;
			u32 overflow_gsiv;
			u32 node_reference;
			u64 page1_base_address;
			};

	/*******************************************************************************		/*******************************************************************************
	*		*
	* IVRS - I/O Virtualization Reporting Structure		* IVRS - I/O Virtualization Reporting Structure

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