Commit a5255bc3 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'dmaengine-5.5-rc1' of git://git.infradead.org/users/vkoul/slave-dma 

Pull dmaengine updates from Vinod Koul:
 "Here are the changes this time around, couple of new drivers and
  updates to few more:

   - New drivers for SiFive PDMA, Socionext Milbeaut HDMAC and XDMAC,
     Freescale dpaa2 qDMA

   - Support for X1000 in JZ4780

   - Xilinx dma updates and support for Xilinx AXI MCDM controller

   - New bindings for rcar R8A774B1

   - Minor updates to dw, dma-jz4780, ti-edma, sprd drivers"

* tag 'dmaengine-5.5-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (61 commits)
  dmaengine: Fix Kconfig indentation
  dmaengine: sf-pdma: move macro to header file
  dmaengine: sf-pdma: replace /** with /* for non-function comment
  dmaengine: ti: edma: fix missed failure handling
  dmaengine: mmp_pdma: add missed of_dma_controller_free
  dmaengine: mmp_tdma: add missed of_dma_controller_free
  dmaengine: sprd: Add wrap address support for link-list mode
  MAINTAINERS: Add Green as SiFive PDMA driver maintainer
  dmaengine: sf-pdma: add platform DMA support for HiFive Unleashed A00
  dt-bindings: dmaengine: sf-pdma: add bindins for SiFive PDMA
  dmaengine: zx: remove: removed dmam_pool_destroy
  dmaengine: mediatek: hsdma_probe: fixed a memory leak when devm_request_irq fails
  dmaengine: iop-adma: clean up an indentation issue
  dmaengine: milbeaut-xdmac: remove redundant error log
  dmaengine: milbeaut-hdmac: remove redundant error log
  dmaengine: dma-jz4780: add missed clk_disable_unprepare in remove
  dmaengine: JZ4780: Add support for the X1000.
  dt-bindings: dmaengine: Add X1000 bindings.
  dmaengine: xilinx_dma: Add Xilinx AXI MCDMA Engine driver support
  dmaengine: xilinx_dma: Extend dma_config struct to store irq routine handle
  ...
parents 596cf45c 67805a4b

Documentation/devicetree/bindings/dma/dma-common.yaml

+8 −1
Original line number Diff line number Diff line
@@ -25,11 +25,18 @@ properties: 
      Used to provide DMA controller specific information.



  dma-channel-mask:

    $ref: /schemas/types.yaml#definitions/uint32

    description:

      Bitmask of available DMA channels in ascending order that are

      not reserved by firmware and are available to the

      kernel. i.e. first channel corresponds to LSB.

      The first item in the array is for channels 0-31, the second is for

      channels 32-63, etc.

    allOf:

      - $ref: /schemas/types.yaml#/definitions/uint32-array

    items:

      minItems: 1

      # Should be enough

      maxItems: 255



  dma-channels:

    $ref: /schemas/types.yaml#definitions/uint32

Documentation/devicetree/bindings/dma/jz4780-dma.txt

+2 −1
Original line number Diff line number Diff line
@@ -7,10 +7,11 @@ Required properties: 
  * ingenic,jz4725b-dma

  * ingenic,jz4770-dma

  * ingenic,jz4780-dma

  * ingenic,x1000-dma

- reg: Should contain the DMA channel registers location and length, followed

  by the DMA controller registers location and length.

- interrupts: Should contain the interrupt specifier of the DMA controller.

- clocks: Should contain a clock specifier for the JZ4780 PDMA clock.

- clocks: Should contain a clock specifier for the JZ4780/X1000 PDMA clock.

- #dma-cells: Must be <2>. Number of integer cells in the dmas property of

  DMA clients (see below).

Documentation/devicetree/bindings/dma/milbeaut-m10v-hdmac.txt

0 → 100644
+32 −0
Original line number Diff line number Diff line 
* Milbeaut AHB DMA Controller



Milbeaut AHB DMA controller has transfer capability below.

 - device to memory transfer

 - memory to device transfer



Required property:

- compatible:       Should be  "socionext,milbeaut-m10v-hdmac"

- reg:              Should contain DMA registers location and length.

- interrupts:       Should contain all of the per-channel DMA interrupts.

                     Number of channels is configurable - 2, 4 or 8, so

                     the number of interrupts specified should be {2,4,8}.

- #dma-cells:       Should be 1. Specify the ID of the slave.

- clocks:           Phandle to the clock used by the HDMAC module.





Example:



	hdmac1: dma-controller@1e110000 {

		compatible = "socionext,milbeaut-m10v-hdmac";

		reg = <0x1e110000 0x10000>;

		interrupts = <0 132 4>,

			     <0 133 4>,

			     <0 134 4>,

			     <0 135 4>,

			     <0 136 4>,

			     <0 137 4>,

			     <0 138 4>,

			     <0 139 4>;

		#dma-cells = <1>;

		clocks = <&dummy_clk>;

	};

Documentation/devicetree/bindings/dma/milbeaut-m10v-xdmac.txt

0 → 100644
+24 −0
Original line number Diff line number Diff line 
* Milbeaut AXI DMA Controller



Milbeaut AXI DMA controller has only memory to memory transfer capability.



* DMA controller



Required property:

- compatible: 	Should be  "socionext,milbeaut-m10v-xdmac"

- reg:		Should contain DMA registers location and length.

- interrupts: 	Should contain all of the per-channel DMA interrupts.

                Number of channels is configurable - 2, 4 or 8, so

                the number of interrupts specified should be {2,4,8}.

- #dma-cells: 	Should be 1.



Example:

	xdmac0: dma-controller@1c250000 {

		compatible = "socionext,milbeaut-m10v-xdmac";

		reg = <0x1c250000 0x1000>;

		interrupts = <0 17 0x4>,

			     <0 18 0x4>,

			     <0 19 0x4>,

			     <0 20 0x4>;

		#dma-cells = <1>;

	};

Documentation/devicetree/bindings/dma/renesas,rcar-dmac.txt

+1 −0
Original line number Diff line number Diff line
@@ -21,6 +21,7 @@ Required Properties: 
		- "renesas,dmac-r8a7745" (RZ/G1E)

		- "renesas,dmac-r8a77470" (RZ/G1C)

		- "renesas,dmac-r8a774a1" (RZ/G2M)

		- "renesas,dmac-r8a774b1" (RZ/G2N)

		- "renesas,dmac-r8a774c0" (RZ/G2E)

		- "renesas,dmac-r8a7790" (R-Car H2)

		- "renesas,dmac-r8a7791" (R-Car M2-W)

CRA Git | Maintained and supported by SUSTech CRA and CCSE