Commit a48e486b authored by Bjorn Helgaas's avatar Bjorn Helgaas
Browse files

Merge branch 'pci/msi' 

- Disable MSI for broken Pericom PCIe-USB adapter (Andy Shevchenko)

- Move MSI/MSI-X init to msi.c (Bjorn Helgaas)

- Move MSI/MSI-X flags updaters to msi.c (Bjorn Helgaas)

- Warn if we assign 64-bit MSI address to device that only supports 32-bit
  MSI (Vidya Sagar)

* pci/msi:
  PCI/MSI: Set device flag indicating only 32-bit MSI support
  PCI/MSI: Move MSI/MSI-X flags updaters to msi.c
  PCI/MSI: Move MSI/MSI-X init to msi.c
  PCI: Use predefined Pericom Vendor ID
  PCI: Disable MSI for Pericom PCIe-USB adapter
parents 6db645f9 2053230a

drivers/pci/Makefile

+1 −2
Original line number Diff line number Diff line
@@ -5,7 +5,7 @@ 
obj-$(CONFIG_PCI)		+= access.o bus.o probe.o host-bridge.o \

				   remove.o pci.o pci-driver.o search.o \

				   pci-sysfs.o rom.o setup-res.o irq.o vpd.o \

				   setup-bus.o vc.o mmap.o setup-irq.o

				   setup-bus.o vc.o mmap.o setup-irq.o msi.o



obj-$(CONFIG_PCI)		+= pcie/
@@ -18,7 +18,6 @@ endif 
obj-$(CONFIG_OF)		+= of.o

obj-$(CONFIG_PCI_QUIRKS)	+= quirks.o

obj-$(CONFIG_HOTPLUG_PCI)	+= hotplug/

obj-$(CONFIG_PCI_MSI)		+= msi.o

obj-$(CONFIG_PCI_ATS)		+= ats.o

obj-$(CONFIG_PCI_IOV)		+= iov.o

obj-$(CONFIG_PCI_BRIDGE_EMUL)	+= pci-bridge-emul.o

drivers/pci/msi.c

+65 −5
Original line number Diff line number Diff line
@@ -26,6 +26,8 @@ 


#include "pci.h"



#ifdef CONFIG_PCI_MSI



static int pci_msi_enable = 1;

int pci_msi_ignore_mask;
@@ -410,6 +412,17 @@ static void pci_intx_for_msi(struct pci_dev *dev, int enable) 
		pci_intx(dev, enable);

}



static void pci_msi_set_enable(struct pci_dev *dev, int enable)

{

	u16 control;



	pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &control);

	control &= ~PCI_MSI_FLAGS_ENABLE;

	if (enable)

		control |= PCI_MSI_FLAGS_ENABLE;

	pci_write_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, control);

}



static void __pci_restore_msi_state(struct pci_dev *dev)

{

	u16 control;
@@ -432,6 +445,16 @@ static void __pci_restore_msi_state(struct pci_dev *dev) 
	pci_write_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, control);

}



static void pci_msix_clear_and_set_ctrl(struct pci_dev *dev, u16 clear, u16 set)

{

	u16 ctrl;



	pci_read_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, &ctrl);

	ctrl &= ~clear;

	ctrl |= set;

	pci_write_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, ctrl);

}



static void __pci_restore_msix_state(struct pci_dev *dev)

{

	struct msi_desc *entry;
@@ -600,12 +623,12 @@ static int msi_verify_entries(struct pci_dev *dev) 
	struct msi_desc *entry;



	for_each_pci_msi_entry(entry, dev) {

		if (!dev->no_64bit_msi || !entry->msg.address_hi)

			continue;

		pci_err(dev, "Device has broken 64-bit MSI but arch"

			" tried to assign one above 4G\n");

		if (entry->msg.address_hi && dev->no_64bit_msi) {

			pci_err(dev, "arch assigned 64-bit MSI address %#x%08x but device only supports 32 bits\n",

				entry->msg.address_hi, entry->msg.address_lo);

			return -EIO;

		}

	}

	return 0;

}
@@ -1577,3 +1600,40 @@ bool pci_dev_has_special_msi_domain(struct pci_dev *pdev) 
}



#endif /* CONFIG_PCI_MSI_IRQ_DOMAIN */

#endif /* CONFIG_PCI_MSI */



void pci_msi_init(struct pci_dev *dev)

{

	u16 ctrl;



	/*

	 * Disable the MSI hardware to avoid screaming interrupts

	 * during boot.  This is the power on reset default so

	 * usually this should be a noop.

	 */

	dev->msi_cap = pci_find_capability(dev, PCI_CAP_ID_MSI);

	if (!dev->msi_cap)

		return;



	pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &ctrl);

	if (ctrl & PCI_MSI_FLAGS_ENABLE)

		pci_write_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS,

				      ctrl & ~PCI_MSI_FLAGS_ENABLE);



	if (!(ctrl & PCI_MSI_FLAGS_64BIT))

		dev->no_64bit_msi = 1;

}



void pci_msix_init(struct pci_dev *dev)

{

	u16 ctrl;



	dev->msix_cap = pci_find_capability(dev, PCI_CAP_ID_MSIX);

	if (!dev->msix_cap)

		return;



	pci_read_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, &ctrl);

	if (ctrl & PCI_MSIX_FLAGS_ENABLE)

		pci_write_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS,

				      ctrl & ~PCI_MSIX_FLAGS_ENABLE);

}

drivers/pci/pci.h

+2 −21
Original line number Diff line number Diff line
@@ -104,6 +104,8 @@ void pci_config_pm_runtime_get(struct pci_dev *dev); 
void pci_config_pm_runtime_put(struct pci_dev *dev);

void pci_pm_init(struct pci_dev *dev);

void pci_ea_init(struct pci_dev *dev);

void pci_msi_init(struct pci_dev *dev);

void pci_msix_init(struct pci_dev *dev);

void pci_allocate_cap_save_buffers(struct pci_dev *dev);

void pci_free_cap_save_buffers(struct pci_dev *dev);

bool pci_bridge_d3_possible(struct pci_dev *dev);
@@ -185,27 +187,6 @@ void pci_no_msi(void); 
static inline void pci_no_msi(void) { }

#endif



static inline void pci_msi_set_enable(struct pci_dev *dev, int enable)

{

	u16 control;



	pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &control);

	control &= ~PCI_MSI_FLAGS_ENABLE;

	if (enable)

		control |= PCI_MSI_FLAGS_ENABLE;

	pci_write_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, control);

}



static inline void pci_msix_clear_and_set_ctrl(struct pci_dev *dev, u16 clear, u16 set)

{

	u16 ctrl;



	pci_read_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, &ctrl);

	ctrl &= ~clear;

	ctrl |= set;

	pci_write_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, ctrl);

}



void pci_realloc_get_opt(char *);



static inline int pci_no_d1d2(struct pci_dev *dev)

drivers/pci/probe.c

+2 −19
Original line number Diff line number Diff line
@@ -1717,22 +1717,6 @@ static u8 pci_hdr_type(struct pci_dev *dev) 


#define LEGACY_IO_RESOURCE	(IORESOURCE_IO | IORESOURCE_PCI_FIXED)



static void pci_msi_setup_pci_dev(struct pci_dev *dev)

{

	/*

	 * Disable the MSI hardware to avoid screaming interrupts

	 * during boot.  This is the power on reset default so

	 * usually this should be a noop.

	 */

	dev->msi_cap = pci_find_capability(dev, PCI_CAP_ID_MSI);

	if (dev->msi_cap)

		pci_msi_set_enable(dev, 0);



	dev->msix_cap = pci_find_capability(dev, PCI_CAP_ID_MSIX);

	if (dev->msix_cap)

		pci_msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_ENABLE, 0);

}



/**

 * pci_intx_mask_broken - Test PCI_COMMAND_INTX_DISABLE writability

 * @dev: PCI device
@@ -2399,9 +2383,8 @@ void pcie_report_downtraining(struct pci_dev *dev) 
static void pci_init_capabilities(struct pci_dev *dev)

{

	pci_ea_init(dev);		/* Enhanced Allocation */



	/* Setup MSI caps & disable MSI/MSI-X interrupts */

	pci_msi_setup_pci_dev(dev);

	pci_msi_init(dev);		/* Disable MSI */

	pci_msix_init(dev);		/* Disable MSI-X */



	/* Buffers for saving PCIe and PCI-X capabilities */

	pci_allocate_cap_save_buffers(dev);

drivers/pci/quirks.c

+16 −7
Original line number Diff line number Diff line
@@ -2356,9 +2356,9 @@ static void quirk_enable_clear_retrain_link(struct pci_dev *dev) 
	dev->clear_retrain_link = 1;

	pci_info(dev, "Enable PCIe Retrain Link quirk\n");

}

DECLARE_PCI_FIXUP_HEADER(0x12d8, 0xe110, quirk_enable_clear_retrain_link);

DECLARE_PCI_FIXUP_HEADER(0x12d8, 0xe111, quirk_enable_clear_retrain_link);

DECLARE_PCI_FIXUP_HEADER(0x12d8, 0xe130, quirk_enable_clear_retrain_link);

DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_PERICOM, 0xe110, quirk_enable_clear_retrain_link);

DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_PERICOM, 0xe111, quirk_enable_clear_retrain_link);

DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_PERICOM, 0xe130, quirk_enable_clear_retrain_link);



static void fixup_rev1_53c810(struct pci_dev *dev)

{
@@ -5567,17 +5567,26 @@ static void pci_fixup_no_d0_pme(struct pci_dev *dev) 
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ASMEDIA, 0x2142, pci_fixup_no_d0_pme);



/*

 * Device [12d8:0x400e] and [12d8:0x400f]

 * Device 12d8:0x400e [OHCI] and 12d8:0x400f [EHCI]

 *

 * These devices advertise PME# support in all power states but don't

 * reliably assert it.

 *

 * These devices also advertise MSI, but documentation (PI7C9X440SL.pdf)

 * says "The MSI Function is not implemented on this device" in chapters

 * 7.3.27, 7.3.29-7.3.31.

 */

static void pci_fixup_no_pme(struct pci_dev *dev)

static void pci_fixup_no_msi_no_pme(struct pci_dev *dev)

{

#ifdef CONFIG_PCI_MSI

	pci_info(dev, "MSI is not implemented on this device, disabling it\n");

	dev->no_msi = 1;

#endif

	pci_info(dev, "PME# is unreliable, disabling it\n");

	dev->pme_support = 0;

}

DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_PERICOM, 0x400e, pci_fixup_no_pme);

DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_PERICOM, 0x400f, pci_fixup_no_pme);

DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_PERICOM, 0x400e, pci_fixup_no_msi_no_pme);

DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_PERICOM, 0x400f, pci_fixup_no_msi_no_pme);



static void apex_pci_fixup_class(struct pci_dev *pdev)

{

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