Merge tag 'irq-urgent-2020-03-15' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip (a42a7bb6) · Commits · 戴 / test

Documentation/arm64/silicon-errata.rst

+2 −0

Original line number	Diff line number	Diff line
		@@ -110,6 +110,8 @@ stable kernels.
		+----------------+-----------------+-----------------+-----------------------------+
		\| Cavium \| ThunderX GICv3 \| #23154 \| CAVIUM_ERRATUM_23154 \|
		+----------------+-----------------+-----------------+-----------------------------+
		\| Cavium \| ThunderX GICv3 \| #38539 \| N/A \|
		+----------------+-----------------+-----------------+-----------------------------+
		\| Cavium \| ThunderX Core \| #27456 \| CAVIUM_ERRATUM_27456 \|
		+----------------+-----------------+-----------------+-----------------------------+
		\| Cavium \| ThunderX Core \| #30115 \| CAVIUM_ERRATUM_30115 \|

drivers/irqchip/irq-gic-v3.c

+29 −1

Original line number	Diff line number	Diff line
		@@ -34,6 +34,7 @@
		#define GICD_INT_NMI_PRI (GICD_INT_DEF_PRI & ~0x80)

		#define FLAGS_WORKAROUND_GICR_WAKER_MSM8996 (1ULL << 0)
		#define FLAGS_WORKAROUND_CAVIUM_ERRATUM_38539 (1ULL << 1)

		struct redist_region {
		void __iomem *redist_base;
		@@ -1464,6 +1465,15 @@ static bool gic_enable_quirk_msm8996(void *data)
		return true;
		}

		static bool gic_enable_quirk_cavium_38539(void *data)
		{
		struct gic_chip_data *d = data;

		d->flags \|= FLAGS_WORKAROUND_CAVIUM_ERRATUM_38539;

		return true;
		}

		static bool gic_enable_quirk_hip06_07(void *data)
		{
		struct gic_chip_data *d = data;
		@@ -1502,6 +1512,19 @@ static const struct gic_quirk gic_quirks[] = {
		.mask = 0xffffffff,
		.init = gic_enable_quirk_hip06_07,
		},
		{
		/*
		* Reserved register accesses generate a Synchronous
		* External Abort. This erratum applies to:
		* - ThunderX: CN88xx
		* - OCTEON TX: CN83xx, CN81xx
		* - OCTEON TX2: CN93xx, CN96xx, CN98xx, CNF95xx*
		*/
		.desc = "GICv3: Cavium erratum 38539",
		.iidr = 0xa000034c,
		.mask = 0xe8f00fff,
		.init = gic_enable_quirk_cavium_38539,
		},
		{
		}
		};
		@@ -1577,6 +1600,11 @@ static int __init gic_init_bases(void __iomem *dist_base,
		pr_info("%d SPIs implemented\n", GIC_LINE_NR - 32);
		pr_info("%d Extended SPIs implemented\n", GIC_ESPI_NR);

		/*
		* ThunderX1 explodes on reading GICD_TYPER2, in violation of the
		* architecture spec (which says that reserved registers are RES0).
		*/
		if (!(gic_data.flags & FLAGS_WORKAROUND_CAVIUM_ERRATUM_38539))
		gic_data.rdists.gicd_typer2 = readl_relaxed(gic_data.dist_base + GICD_TYPER2);

		gic_data.domain = irq_domain_create_tree(handle, &gic_irq_domain_ops,

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