Commit a4131561 authored by Thierry Reding's avatar Thierry Reding
Browse files

arm64: tegra: Wire up pinctrl states for all DPAUX controllers 



All four DPAUX controllers on Tegra194 control the pin configuration of
their companion I2C controllers. Wire up all the pinctrl states for the
I2C controllers so that their pins can be correctly muxed when needed.

Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent 228f1e6a

arch/arm64/boot/dts/nvidia/tegra194.dtsi

+16 −2
Original line number Diff line number Diff line
@@ -329,6 +329,9 @@ 
			clock-names = "div-clk";

			resets = <&bpmp TEGRA194_RESET_I2C4>;

			reset-names = "i2c";

			pinctrl-0 = <&state_dpaux1_i2c>;

			pinctrl-1 = <&state_dpaux1_off>;

			pinctrl-names = "default", "idle";

			status = "disabled";

		};
@@ -343,10 +346,14 @@ 
			clock-names = "div-clk";

			resets = <&bpmp TEGRA194_RESET_I2C6>;

			reset-names = "i2c";

			pinctrl-0 = <&state_dpaux0_i2c>;

			pinctrl-1 = <&state_dpaux0_off>;

			pinctrl-names = "default", "idle";

			status = "disabled";

		};



		gen7_i2c: i2c@31c0000 {

		/* shares pads with dpaux2 */

		dp_aux_ch2_i2c: i2c@31c0000 {

			compatible = "nvidia,tegra194-i2c";

			reg = <0x031c0000 0x10000>;

			interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
@@ -356,10 +363,14 @@ 
			clock-names = "div-clk";

			resets = <&bpmp TEGRA194_RESET_I2C7>;

			reset-names = "i2c";

			pinctrl-0 = <&state_dpaux2_i2c>;

			pinctrl-1 = <&state_dpaux2_off>;

			pinctrl-names = "default", "idle";

			status = "disabled";

		};



		gen9_i2c: i2c@31e0000 {

		/* shares pads with dpaux3 */

		dp_aux_ch3_i2c: i2c@31e0000 {

			compatible = "nvidia,tegra194-i2c";

			reg = <0x031e0000 0x10000>;

			interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
@@ -369,6 +380,9 @@ 
			clock-names = "div-clk";

			resets = <&bpmp TEGRA194_RESET_I2C9>;

			reset-names = "i2c";

			pinctrl-0 = <&state_dpaux3_i2c>;

			pinctrl-1 = <&state_dpaux3_off>;

			pinctrl-names = "default", "idle";

			status = "disabled";

		};

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