staging: ccree: fold reg common defines into driver (a3ddcf66) · Commits · 戴 / test

drivers/staging/ccree/cc_crypto_ctx.h

+2 −2

Original line number	Diff line number	Diff line
		@@ -8,7 +8,7 @@

		/* context size */
		#ifndef CC_CTX_SIZE_LOG2
		#if (CC_SUPPORT_SHA > 256)
		#if (CC_DEV_SHA_MAX > 256)
		#define CC_CTX_SIZE_LOG2 8
		#else
		#define CC_CTX_SIZE_LOG2 7
		@@ -59,7 +59,7 @@
		#define CC_SHA384_BLOCK_SIZE 128
		#define CC_SHA512_BLOCK_SIZE 128

		#if (CC_SUPPORT_SHA > 256)
		#if (CC_DEV_SHA_MAX > 256)
		#define CC_DIGEST_SIZE_MAX CC_SHA512_DIGEST_SIZE
		#define CC_HASH_BLOCK_SIZE_MAX CC_SHA512_BLOCK_SIZE /1024b/
		#else /* Only up to SHA256 */

deleted100644 → 0

+0 −13

Original line number	Diff line number	Diff line
		/* SPDX-License-Identifier: GPL-2.0 */
		/* Copyright (C) 2012-2018 ARM Limited or its affiliates. */

		#ifndef __CC_REG_COMMON_H__
		#define __CC_REG_COMMON_H__

		#define CC_DEV_SIGNATURE 0xDCC71200UL

		#define CC_HW_VERSION 0xef840015UL

		#define CC_DEV_SHA_MAX 512

		#endif /__CC_REG_COMMON_H__/

+3 −2

Original line number	Diff line number	Diff line
		@@ -27,8 +27,7 @@

		/* Registers definitions from shared/hw/ree_include */
		#include "dx_host.h"
		#include "dx_reg_common.h"
		#define CC_SUPPORT_SHA CC_DEV_SHA_MAX
		#define CC_DEV_SHA_MAX 512
		#include "cc_crypto_ctx.h"
		#include "cc_hw_queue_defs.h"
		#include "ssi_sram_mgr.h"
		@@ -44,6 +43,8 @@ extern bool cc_dump_bytes;
		/* Maximum DMA mask supported by IP */
		#define DMA_BIT_MASK_LEN 48

		#define CC_DEV_SIGNATURE 0xDCC71200UL

		#define CC_AXI_IRQ_MASK ((1 << CC_AXIM_CFG_BRESPMASK_BIT_SHIFT) \| \
		(1 << CC_AXIM_CFG_RRESPMASK_BIT_SHIFT) \| \
		(1 << CC_AXIM_CFG_INFLTMASK_BIT_SHIFT) \| \