Commit a37ff8f9 authored by Dmitry Osipenko's avatar Dmitry Osipenko Committed by Thierry Reding
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ARM: dts: tegra20: Add Memory Client reset to VDE 



Hook up Memory Client reset of the Video Decoder to the decoders DT node.

Signed-off-by: default avatarDmitry Osipenko <digetx@gmail.com>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent ce397d21

arch/arm/boot/dts/tegra20.dtsi

+5 −2
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0

#include <dt-bindings/clock/tegra20-car.h>

#include <dt-bindings/gpio/tegra-gpio.h>

#include <dt-bindings/memory/tegra20-mc.h>

#include <dt-bindings/pinctrl/pinctrl-tegra.h>

#include <dt-bindings/interrupt-controller/arm-gic.h>
@@ -282,7 +283,8 @@ 
			     <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; /* SXE interrupt */

		interrupt-names = "sync-token", "bsev", "sxe";

		clocks = <&tegra_car TEGRA20_CLK_VDE>;

		resets = <&tegra_car 61>;

		reset-names = "vde", "mc";

		resets = <&tegra_car 61>, <&mc TEGRA20_MC_RESET_VDE>;

	};



	apbmisc@70000800 {
@@ -593,11 +595,12 @@ 
		clock-names = "pclk", "clk32k_in";

	};



	memory-controller@7000f000 {

	mc: memory-controller@7000f000 {

		compatible = "nvidia,tegra20-mc";

		reg = <0x7000f000 0x024

		       0x7000f03c 0x3c4>;

		interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;

		#reset-cells = <1>;

	};



	iommu@7000f024 {

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