Commit a3405d0c authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/amdgpu: remove unused display_vblank_wait interface 



No longer used since we changed the MC programming sequence.

Reviewed-by: default avatarMichel Dänzer <michel.daenzer@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent e5e0e867

drivers/gpu/drm/amd/amdgpu/amdgpu.h

+0 −1
Original line number Diff line number Diff line
@@ -1804,7 +1804,6 @@ amdgpu_get_sdma_instance(struct amdgpu_ring *ring) 
#define amdgpu_ih_decode_iv(adev, iv) (adev)->irq.ih_funcs->decode_iv((adev), (iv))

#define amdgpu_ih_set_rptr(adev) (adev)->irq.ih_funcs->set_rptr((adev))

#define amdgpu_display_vblank_get_counter(adev, crtc) (adev)->mode_info.funcs->vblank_get_counter((adev), (crtc))

#define amdgpu_display_vblank_wait(adev, crtc) (adev)->mode_info.funcs->vblank_wait((adev), (crtc))

#define amdgpu_display_backlight_set_level(adev, e, l) (adev)->mode_info.funcs->backlight_set_level((e), (l))

#define amdgpu_display_backlight_get_level(adev, e) (adev)->mode_info.funcs->backlight_get_level((e))

#define amdgpu_display_hpd_sense(adev, h) (adev)->mode_info.funcs->hpd_sense((adev), (h))

drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h

+0 −2
Original line number Diff line number Diff line
@@ -267,8 +267,6 @@ struct amdgpu_display_funcs { 
	void (*bandwidth_update)(struct amdgpu_device *adev);

	/* get frame count */

	u32 (*vblank_get_counter)(struct amdgpu_device *adev, int crtc);

	/* wait for vblank */

	void (*vblank_wait)(struct amdgpu_device *adev, int crtc);

	/* set backlight level */

	void (*backlight_set_level)(struct amdgpu_encoder *amdgpu_encoder,

				    u8 level);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

+0 −61
Original line number Diff line number Diff line
@@ -190,66 +190,6 @@ static void dce_v10_0_audio_endpt_wreg(struct amdgpu_device *adev, 
	spin_unlock_irqrestore(&adev->audio_endpt_idx_lock, flags);

}



static bool dce_v10_0_is_in_vblank(struct amdgpu_device *adev, int crtc)

{

	if (RREG32(mmCRTC_STATUS + crtc_offsets[crtc]) &

	    CRTC_STATUS__CRTC_V_BLANK_MASK)

		return true;

	else

		return false;

}



static bool dce_v10_0_is_counter_moving(struct amdgpu_device *adev, int crtc)

{

	u32 pos1, pos2;



	pos1 = RREG32(mmCRTC_STATUS_POSITION + crtc_offsets[crtc]);

	pos2 = RREG32(mmCRTC_STATUS_POSITION + crtc_offsets[crtc]);



	if (pos1 != pos2)

		return true;

	else

		return false;

}



/**

 * dce_v10_0_vblank_wait - vblank wait asic callback.

 *

 * @adev: amdgpu_device pointer

 * @crtc: crtc to wait for vblank on

 *

 * Wait for vblank on the requested crtc (evergreen+).

 */

static void dce_v10_0_vblank_wait(struct amdgpu_device *adev, int crtc)

{

	unsigned i = 100;



	if (crtc >= adev->mode_info.num_crtc)

		return;



	if (!(RREG32(mmCRTC_CONTROL + crtc_offsets[crtc]) & CRTC_CONTROL__CRTC_MASTER_EN_MASK))

		return;



	/* depending on when we hit vblank, we may be close to active; if so,

	 * wait for another frame.

	 */

	while (dce_v10_0_is_in_vblank(adev, crtc)) {

		if (i++ == 100) {

			i = 0;

			if (!dce_v10_0_is_counter_moving(adev, crtc))

				break;

		}

	}



	while (!dce_v10_0_is_in_vblank(adev, crtc)) {

		if (i++ == 100) {

			i = 0;

			if (!dce_v10_0_is_counter_moving(adev, crtc))

				break;

		}

	}

}



static u32 dce_v10_0_vblank_get_counter(struct amdgpu_device *adev, int crtc)

{

	if (crtc >= adev->mode_info.num_crtc)
@@ -3602,7 +3542,6 @@ static void dce_v10_0_encoder_add(struct amdgpu_device *adev, 
static const struct amdgpu_display_funcs dce_v10_0_display_funcs = {

	.bandwidth_update = &dce_v10_0_bandwidth_update,

	.vblank_get_counter = &dce_v10_0_vblank_get_counter,

	.vblank_wait = &dce_v10_0_vblank_wait,

	.backlight_set_level = &amdgpu_atombios_encoder_set_backlight_level,

	.backlight_get_level = &amdgpu_atombios_encoder_get_backlight_level,

	.hpd_sense = &dce_v10_0_hpd_sense,

drivers/gpu/drm/amd/amdgpu/dce_v11_0.c

+0 −61
Original line number Diff line number Diff line
@@ -207,66 +207,6 @@ static void dce_v11_0_audio_endpt_wreg(struct amdgpu_device *adev, 
	spin_unlock_irqrestore(&adev->audio_endpt_idx_lock, flags);

}



static bool dce_v11_0_is_in_vblank(struct amdgpu_device *adev, int crtc)

{

	if (RREG32(mmCRTC_STATUS + crtc_offsets[crtc]) &

	    CRTC_STATUS__CRTC_V_BLANK_MASK)

		return true;

	else

		return false;

}



static bool dce_v11_0_is_counter_moving(struct amdgpu_device *adev, int crtc)

{

	u32 pos1, pos2;



	pos1 = RREG32(mmCRTC_STATUS_POSITION + crtc_offsets[crtc]);

	pos2 = RREG32(mmCRTC_STATUS_POSITION + crtc_offsets[crtc]);



	if (pos1 != pos2)

		return true;

	else

		return false;

}



/**

 * dce_v11_0_vblank_wait - vblank wait asic callback.

 *

 * @adev: amdgpu_device pointer

 * @crtc: crtc to wait for vblank on

 *

 * Wait for vblank on the requested crtc (evergreen+).

 */

static void dce_v11_0_vblank_wait(struct amdgpu_device *adev, int crtc)

{

	unsigned i = 100;



	if (crtc < 0 || crtc >= adev->mode_info.num_crtc)

		return;



	if (!(RREG32(mmCRTC_CONTROL + crtc_offsets[crtc]) & CRTC_CONTROL__CRTC_MASTER_EN_MASK))

		return;



	/* depending on when we hit vblank, we may be close to active; if so,

	 * wait for another frame.

	 */

	while (dce_v11_0_is_in_vblank(adev, crtc)) {

		if (i++ == 100) {

			i = 0;

			if (!dce_v11_0_is_counter_moving(adev, crtc))

				break;

		}

	}



	while (!dce_v11_0_is_in_vblank(adev, crtc)) {

		if (i++ == 100) {

			i = 0;

			if (!dce_v11_0_is_counter_moving(adev, crtc))

				break;

		}

	}

}



static u32 dce_v11_0_vblank_get_counter(struct amdgpu_device *adev, int crtc)

{

	if (crtc < 0 || crtc >= adev->mode_info.num_crtc)
@@ -3727,7 +3667,6 @@ static void dce_v11_0_encoder_add(struct amdgpu_device *adev, 
static const struct amdgpu_display_funcs dce_v11_0_display_funcs = {

	.bandwidth_update = &dce_v11_0_bandwidth_update,

	.vblank_get_counter = &dce_v11_0_vblank_get_counter,

	.vblank_wait = &dce_v11_0_vblank_wait,

	.backlight_set_level = &amdgpu_atombios_encoder_set_backlight_level,

	.backlight_get_level = &amdgpu_atombios_encoder_get_backlight_level,

	.hpd_sense = &dce_v11_0_hpd_sense,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

+0 −59
Original line number Diff line number Diff line
@@ -142,64 +142,6 @@ static void dce_v6_0_audio_endpt_wreg(struct amdgpu_device *adev, 
	spin_unlock_irqrestore(&adev->audio_endpt_idx_lock, flags);

}



static bool dce_v6_0_is_in_vblank(struct amdgpu_device *adev, int crtc)

{

	if (RREG32(mmCRTC_STATUS + crtc_offsets[crtc]) & CRTC_STATUS__CRTC_V_BLANK_MASK)

		return true;

	else

		return false;

}



static bool dce_v6_0_is_counter_moving(struct amdgpu_device *adev, int crtc)

{

	u32 pos1, pos2;



	pos1 = RREG32(mmCRTC_STATUS_POSITION + crtc_offsets[crtc]);

	pos2 = RREG32(mmCRTC_STATUS_POSITION + crtc_offsets[crtc]);



	if (pos1 != pos2)

		return true;

	else

		return false;

}



/**

 * dce_v6_0_wait_for_vblank - vblank wait asic callback.

 *

 * @crtc: crtc to wait for vblank on

 *

 * Wait for vblank on the requested crtc (evergreen+).

 */

static void dce_v6_0_vblank_wait(struct amdgpu_device *adev, int crtc)

{

	unsigned i = 100;



	if (crtc >= adev->mode_info.num_crtc)

		return;



	if (!(RREG32(mmCRTC_CONTROL + crtc_offsets[crtc]) & CRTC_CONTROL__CRTC_MASTER_EN_MASK))

		return;



	/* depending on when we hit vblank, we may be close to active; if so,

	 * wait for another frame.

	 */

	while (dce_v6_0_is_in_vblank(adev, crtc)) {

		if (i++ == 100) {

			i = 0;

			if (!dce_v6_0_is_counter_moving(adev, crtc))

				break;

		}

	}



	while (!dce_v6_0_is_in_vblank(adev, crtc)) {

		if (i++ == 100) {

			i = 0;

			if (!dce_v6_0_is_counter_moving(adev, crtc))

				break;

		}

	}

}



static u32 dce_v6_0_vblank_get_counter(struct amdgpu_device *adev, int crtc)

{

	if (crtc >= adev->mode_info.num_crtc)
@@ -3409,7 +3351,6 @@ static void dce_v6_0_encoder_add(struct amdgpu_device *adev, 
static const struct amdgpu_display_funcs dce_v6_0_display_funcs = {

	.bandwidth_update = &dce_v6_0_bandwidth_update,

	.vblank_get_counter = &dce_v6_0_vblank_get_counter,

	.vblank_wait = &dce_v6_0_vblank_wait,

	.backlight_set_level = &amdgpu_atombios_encoder_set_backlight_level,

	.backlight_get_level = &amdgpu_atombios_encoder_get_backlight_level,

	.hpd_sense = &dce_v6_0_hpd_sense,

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