Commit a323da4b authored by Grygorii Strashko's avatar Grygorii Strashko Committed by Nishanth Menon
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arm64: dts: ti: k3-j7200-mcu: add mcu cpsw nuss node



Add DT node for The TI J7200 MCU SoC Gigabit Ethernet two ports Switch
subsystem (MCU CPSW NUSS).

Signed-off-by: default avatarGrygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: default avatarNishanth Menon <nm@ti.com>
Reviewed-by: default avatarSuman Anna <s-anna@ti.com>
Link: https://lore.kernel.org/r/20200923220938.30788-4-grygorii.strashko@ti.com
parent c5d73d8d
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+74 −0
Original line number Diff line number Diff line
@@ -34,6 +34,20 @@
		};
	};

	mcu_conf: syscon@40f00000 {
		compatible = "syscon", "simple-mfd";
		reg = <0x00 0x40f00000 0x00 0x20000>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x00 0x00 0x40f00000 0x20000>;

		phy_gmii_sel: phy@4040 {
			compatible = "ti,am654-phy-gmii-sel";
			reg = <0x4040 0x4>;
			#phy-cells = <1>;
		};
	};

	chipid@43000014 {
		compatible = "ti,am654-chipid";
		reg = <0x00 0x43000014 0x00 0x4>;
@@ -136,4 +150,64 @@
			ti,sci-rm-range-rflow = <0x00>; /* GP RFLOW */
		};
	};

	mcu_cpsw: ethernet@46000000 {
		compatible = "ti,j721e-cpsw-nuss";
		#address-cells = <2>;
		#size-cells = <2>;
		reg = <0x00 0x46000000 0x00 0x200000>;
		reg-names = "cpsw_nuss";
		ranges = <0x00 0x00 0x00 0x46000000 0x00 0x200000>;
		dma-coherent;
		clocks = <&k3_clks 18 21>;
		clock-names = "fck";
		power-domains = <&k3_pds 18 TI_SCI_PD_EXCLUSIVE>;

		dmas = <&mcu_udmap 0xf000>,
		       <&mcu_udmap 0xf001>,
		       <&mcu_udmap 0xf002>,
		       <&mcu_udmap 0xf003>,
		       <&mcu_udmap 0xf004>,
		       <&mcu_udmap 0xf005>,
		       <&mcu_udmap 0xf006>,
		       <&mcu_udmap 0xf007>,
		       <&mcu_udmap 0x7000>;
		dma-names = "tx0", "tx1", "tx2", "tx3",
			    "tx4", "tx5", "tx6", "tx7",
			    "rx";

		ethernet-ports {
			#address-cells = <1>;
			#size-cells = <0>;

			cpsw_port1: port@1 {
				reg = <1>;
				ti,mac-only;
				label = "port1";
				ti,syscon-efuse = <&mcu_conf 0x200>;
				phys = <&phy_gmii_sel 1>;
			};
		};

		davinci_mdio: mdio@f00 {
			compatible = "ti,cpsw-mdio","ti,davinci_mdio";
			reg = <0x00 0xf00 0x00 0x100>;
			#address-cells = <1>;
			#size-cells = <0>;
			clocks = <&k3_clks 18 21>;
			clock-names = "fck";
			bus_freq = <1000000>;
		};

		cpts@3d000 {
			compatible = "ti,am65-cpts";
			reg = <0x00 0x3d000 0x00 0x400>;
			clocks = <&k3_clks 18 2>;
			clock-names = "cpts";
			interrupts-extended = <&gic500 GIC_SPI 858 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "cpts";
			ti,cpts-ext-ts-inputs = <4>;
			ti,cpts-periodic-outputs = <2>;
		};
	};
};