Commit a2cfe81a authored by Robert Hancock's avatar Robert Hancock Committed by Jeff Garzik
Browse files

sata_nv: wait for response on entering/leaving ADMA mode 



Update sata_nv to wait for the controller to indicate via the status
register that it has entered the requested state when switching between
ADMA mode and register mode.  This issue came up recently when debugging
some problems with cache flush command timeouts and while it didn't appear
to fix that problem, this is something we should likely be doing in any
case.

Signed-off-by: default avatarRobert Hancock <hancockr@shaw.ca>
Cc: Tejun Heo <htejun@gmail.com>
Cc: Jeff Garzik <jeff@garzik.org>
Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: default avatarJeff Garzik <jeff@garzik.org>
parent 382a6652

drivers/ata/sata_nv.c

+39 −2
Original line number Original line Diff line number Diff line
@@ -512,14 +512,38 @@ static void nv_adma_register_mode(struct ata_port *ap) 
{

{

	struct nv_adma_port_priv *pp = ap->private_data;

	struct nv_adma_port_priv *pp = ap->private_data;

	void __iomem *mmio = pp->ctl_block;

	void __iomem *mmio = pp->ctl_block;

	u16 tmp;

	u16 tmp, status;

	int count = 0;





	if (pp->flags & NV_ADMA_PORT_REGISTER_MODE)

	if (pp->flags & NV_ADMA_PORT_REGISTER_MODE)

		return;

		return;





	status = readw(mmio + NV_ADMA_STAT);

	while(!(status & NV_ADMA_STAT_IDLE) && count < 20) {

		ndelay(50);

		status = readw(mmio + NV_ADMA_STAT);

		count++;

	}

	if(count == 20)

		ata_port_printk(ap, KERN_WARNING,

			"timeout waiting for ADMA IDLE, stat=0x%hx\n",

			status);



	tmp = readw(mmio + NV_ADMA_CTL);

	tmp = readw(mmio + NV_ADMA_CTL);

	writew(tmp & ~NV_ADMA_CTL_GO, mmio + NV_ADMA_CTL);

	writew(tmp & ~NV_ADMA_CTL_GO, mmio + NV_ADMA_CTL);





	count = 0;

	status = readw(mmio + NV_ADMA_STAT);

	while(!(status & NV_ADMA_STAT_LEGACY) && count < 20) {

		ndelay(50);

		status = readw(mmio + NV_ADMA_STAT);

		count++;

	}

	if(count == 20)

		ata_port_printk(ap, KERN_WARNING,

			 "timeout waiting for ADMA LEGACY, stat=0x%hx\n",

			 status);



	pp->flags |= NV_ADMA_PORT_REGISTER_MODE;

	pp->flags |= NV_ADMA_PORT_REGISTER_MODE;

}

}
@@ -527,7 +551,8 @@ static void nv_adma_mode(struct ata_port *ap) 
{

{

	struct nv_adma_port_priv *pp = ap->private_data;

	struct nv_adma_port_priv *pp = ap->private_data;

	void __iomem *mmio = pp->ctl_block;

	void __iomem *mmio = pp->ctl_block;

	u16 tmp;

	u16 tmp, status;

	int count = 0;





	if (!(pp->flags & NV_ADMA_PORT_REGISTER_MODE))

	if (!(pp->flags & NV_ADMA_PORT_REGISTER_MODE))

		return;

		return;
@@ -537,6 +562,18 @@ static void nv_adma_mode(struct ata_port *ap) 
	tmp = readw(mmio + NV_ADMA_CTL);

	tmp = readw(mmio + NV_ADMA_CTL);

	writew(tmp | NV_ADMA_CTL_GO, mmio + NV_ADMA_CTL);

	writew(tmp | NV_ADMA_CTL_GO, mmio + NV_ADMA_CTL);





	status = readw(mmio + NV_ADMA_STAT);

	while(((status & NV_ADMA_STAT_LEGACY) ||

	      !(status & NV_ADMA_STAT_IDLE)) && count < 20) {

		ndelay(50);

		status = readw(mmio + NV_ADMA_STAT);

		count++;

	}

	if(count == 20)

		ata_port_printk(ap, KERN_WARNING,

			"timeout waiting for ADMA LEGACY clear and IDLE, stat=0x%hx\n",

			status);



	pp->flags &= ~NV_ADMA_PORT_REGISTER_MODE;

	pp->flags &= ~NV_ADMA_PORT_REGISTER_MODE;

}

}

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