Commit a2a1d0f5 authored by Huang Rui's avatar Huang Rui Committed by Felipe Balbi
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usb: dwc3: add delay p1p2p3 quirk



This patch adds delay P0 to P1/P2/P3 quirk for U2/U2/U3, and some special
platforms can configure that if it is needed.

[ balbi@ti.com : added DeviceTree binding documentation ]

Signed-off-by: default avatarHuang Rui <ray.huang@amd.com>
Signed-off-by: default avatarFelipe Balbi <balbi@ti.com>
parent df31f5b3
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+2 −0
Original line number Diff line number Diff line
@@ -22,6 +22,8 @@ Optional properties:
 - snps,u2ss_inp3_quirk: set if we enable P3 OK for U2/SS Inactive quirk
 - snps,req_p1p2p3_quirk: when set, the core will always request for
			P1/P2/P3 transition sequence.
 - snps,del_p1p2p3_quirk: when set core will delay P1/P2/P3 until a certain
			amount of 8B10B errors occur.

This is usually a subnode to DWC3 glue to which it is connected.

+6 −0
Original line number Diff line number Diff line
@@ -380,6 +380,9 @@ static void dwc3_phy_setup(struct dwc3 *dwc)
	if (dwc->req_p1p2p3_quirk)
		reg |= DWC3_GUSB3PIPECTL_REQP1P2P3;

	if (dwc->del_p1p2p3_quirk)
		reg |= DWC3_GUSB3PIPECTL_DEP1P2P3_EN;

	dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg);

	mdelay(100);
@@ -761,6 +764,8 @@ static int dwc3_probe(struct platform_device *pdev)
				"snps,u2ss_inp3_quirk");
		dwc->req_p1p2p3_quirk = of_property_read_bool(node,
				"snps,req_p1p2p3_quirk");
		dwc->del_p1p2p3_quirk = of_property_read_bool(node,
				"snps,del_p1p2p3_quirk");
	} else if (pdata) {
		dwc->maximum_speed = pdata->maximum_speed;
		dwc->has_lpm_erratum = pdata->has_lpm_erratum;
@@ -774,6 +779,7 @@ static int dwc3_probe(struct platform_device *pdev)
		dwc->u2exit_lfps_quirk = pdata->u2exit_lfps_quirk;
		dwc->u2ss_inp3_quirk = pdata->u2ss_inp3_quirk;
		dwc->req_p1p2p3_quirk = pdata->req_p1p2p3_quirk;
		dwc->del_p1p2p3_quirk = pdata->del_p1p2p3_quirk;
	}

	/* default to superspeed if no maximum_speed passed */
+5 −0
Original line number Diff line number Diff line
@@ -178,6 +178,9 @@
#define DWC3_GUSB3PIPECTL_PHYSOFTRST	(1 << 31)
#define DWC3_GUSB3PIPECTL_U2SSINP3OK	(1 << 29)
#define DWC3_GUSB3PIPECTL_REQP1P2P3	(1 << 24)
#define DWC3_GUSB3PIPECTL_DEP1P2P3(n)	((n) << 19)
#define DWC3_GUSB3PIPECTL_DEP1P2P3_MASK	DWC3_GUSB3PIPECTL_DEP1P2P3(7)
#define DWC3_GUSB3PIPECTL_DEP1P2P3_EN	DWC3_GUSB3PIPECTL_DEP1P2P3(1)
#define DWC3_GUSB3PIPECTL_SUSPHY	(1 << 17)

/* Global TX Fifo Size Register */
@@ -685,6 +688,7 @@ struct dwc3_scratchpad_array {
 * @u2exit_lfps_quirk: set if we enable u2exit lfps quirk
 * @u2ss_inp3_quirk: set if we enable P3 OK for U2/SS Inactive quirk
 * @req_p1p2p3_quirk: set if we enable request p1p2p3 quirk
 * @del_p1p2p3_quirk: set if we enable delay p1p2p3 quirk
 */
struct dwc3 {
	struct usb_ctrlrequest	*ctrl_req;
@@ -796,6 +800,7 @@ struct dwc3 {
	unsigned		u2exit_lfps_quirk:1;
	unsigned		u2ss_inp3_quirk:1;
	unsigned		req_p1p2p3_quirk:1;
	unsigned                del_p1p2p3_quirk:1;
};

/* -------------------------------------------------------------------------- */
+1 −0
Original line number Diff line number Diff line
@@ -32,4 +32,5 @@ struct dwc3_platform_data {
	unsigned u2exit_lfps_quirk:1;
	unsigned u2ss_inp3_quirk:1;
	unsigned req_p1p2p3_quirk:1;
	unsigned del_p1p2p3_quirk:1;
};