mtd: rawnand: denali: remove ->dev_ready() hook (a2a05c2f) · Commits · 戴 / test

The Denali NAND IP has no way to read out the current signal level of the R/B# pin. Instead, denali_dev_ready() checks if the R/B# transition has already happened. (The INTR__INT_ACT interrupt is asserted at the rising edge of the R/B# pin.) It is not a correct way to implement the ->dev_ready() hook. In fact, it has a drawback; in the nand_scan_ident phase, the chip detection iterates over maxchips until it fails to find a homogeneous chip. For the last loop, nand_reset() fails if no chip is there. If ->dev_ready hook exists, nand_command(_lp) calls nand_wait_ready() after NAND_CMD_RESET. However, we know denali_dev_ready() never returns 1 unless there exists a chip that toggles R/B# in that chip select. Then, nand_wait_ready() just ends up with wasting 400 msec, in the end, shows the "timeout while waiting for chip to become ready" warning. Let's remove the mis-implemented dev_ready hook, and fallback to sending the NAND_CMD_STATUS and nand_wait_status_ready(), which bails out more quickly. Signed-off-by:

Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by:

Miquel Raynal <miquel.raynal@bootlin.com>

drivers/mtd/nand/raw/denali.c

+1 −22

Original line number	Diff line number	Diff line
		@@ -204,18 +204,6 @@ static uint32_t denali_wait_for_irq(struct denali_nand_info *denali,
		return denali->irq_status;
		}

		static uint32_t denali_check_irq(struct denali_nand_info *denali)
		{
		unsigned long flags;
		uint32_t irq_status;

		spin_lock_irqsave(&denali->irq_lock, flags);
		irq_status = denali->irq_status;
		spin_unlock_irqrestore(&denali->irq_lock, flags);

		return irq_status;
		}

		static void denali_read_buf(struct nand_chip chip, uint8_t buf, int len)
		{
		struct mtd_info *mtd = nand_to_mtd(chip);
		@@ -288,8 +276,7 @@ static void denali_cmd_ctrl(struct nand_chip *chip, int dat, unsigned int ctrl)
		return;

		/*
		* Some commands are followed by chip->legacy.dev_ready or
		* chip->legacy.waitfunc.
		* Some commands are followed by chip->legacy.waitfunc.
		* irq_status must be cleared here to catch the R/B# interrupt later.
		*/
		if (ctrl & NAND_CTRL_CHANGE)
		@@ -298,13 +285,6 @@ static void denali_cmd_ctrl(struct nand_chip *chip, int dat, unsigned int ctrl)
		denali->host_write(denali, DENALI_BANK(denali) \| type, dat);
		}

		static int denali_dev_ready(struct nand_chip *chip)
		{
		struct denali_nand_info *denali = mtd_to_denali(nand_to_mtd(chip));

		return !!(denali_check_irq(denali) & INTR__INT_ACT);
		}

		static int denali_check_erased_page(struct mtd_info *mtd,
		struct nand_chip chip, uint8_t buf,
		unsigned long uncor_ecc_flags,
		@@ -1360,7 +1340,6 @@ int denali_init(struct denali_nand_info *denali)
		chip->legacy.read_byte = denali_read_byte;
		chip->legacy.write_byte = denali_write_byte;
		chip->legacy.cmd_ctrl = denali_cmd_ctrl;
		chip->legacy.dev_ready = denali_dev_ready;
		chip->legacy.waitfunc = denali_waitfunc;

		if (features & FEATURES__INDEX_ADDR) {

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