Commit a29ca894 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'bcm_sf2-utilize-b53_common' 



Florian Fainelli says:

====================
net: dsa: Make bcm_sf2 utilize b53_common

This patch series makes the bcm_sf2 driver utilize a large number of the core
functions offered by the b53_common driver since the SWITCH_CORE registers are
mostly register compatible with the switches driven by b53_common.

In order to accomplish that, we just override the dsa_driver_ops callbacks that
we need to. There are still integration specific logic from the bcm_sf2 that we
cannot absorb into b53_common because it is just not there, mostly in the area
of link management and power management, but most of the features are within
b53_common now: VLAN, FDB, bridge

Along the process, we also improve support for the BCM58xx SoCs, since those
also have the same version of the switching IP that 7445 has (for which bcm_sf2
was developed).

Changes in v3:

- rebase against 145dd5f9 ("net: flush the
  softnet backlog in process context")

Changes in v2:

- rebased against "net: dsa: rename switch operations structure"
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents ed35ca99 de0b9d3b

drivers/net/dsa/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -16,6 +16,7 @@ config NET_DSA_BCM_SF2 
	select FIXED_PHY

	select BCM7XXX_PHY

	select MDIO_BCM_UNIMAC

	select B53

	---help---

	  This enables support for the Broadcom Starfighter 2 Ethernet

	  switch chips.

drivers/net/dsa/b53/b53_common.c

+102 −6
Original line number Diff line number Diff line
@@ -167,6 +167,65 @@ static const struct b53_mib_desc b53_mibs[] = { 


#define B53_MIBS_SIZE	ARRAY_SIZE(b53_mibs)



static const struct b53_mib_desc b53_mibs_58xx[] = {

	{ 8, 0x00, "TxOctets" },

	{ 4, 0x08, "TxDropPkts" },

	{ 4, 0x0c, "TxQPKTQ0" },

	{ 4, 0x10, "TxBroadcastPkts" },

	{ 4, 0x14, "TxMulticastPkts" },

	{ 4, 0x18, "TxUnicastPKts" },

	{ 4, 0x1c, "TxCollisions" },

	{ 4, 0x20, "TxSingleCollision" },

	{ 4, 0x24, "TxMultipleCollision" },

	{ 4, 0x28, "TxDeferredCollision" },

	{ 4, 0x2c, "TxLateCollision" },

	{ 4, 0x30, "TxExcessiveCollision" },

	{ 4, 0x34, "TxFrameInDisc" },

	{ 4, 0x38, "TxPausePkts" },

	{ 4, 0x3c, "TxQPKTQ1" },

	{ 4, 0x40, "TxQPKTQ2" },

	{ 4, 0x44, "TxQPKTQ3" },

	{ 4, 0x48, "TxQPKTQ4" },

	{ 4, 0x4c, "TxQPKTQ5" },

	{ 8, 0x50, "RxOctets" },

	{ 4, 0x58, "RxUndersizePkts" },

	{ 4, 0x5c, "RxPausePkts" },

	{ 4, 0x60, "RxPkts64Octets" },

	{ 4, 0x64, "RxPkts65to127Octets" },

	{ 4, 0x68, "RxPkts128to255Octets" },

	{ 4, 0x6c, "RxPkts256to511Octets" },

	{ 4, 0x70, "RxPkts512to1023Octets" },

	{ 4, 0x74, "RxPkts1024toMaxPktsOctets" },

	{ 4, 0x78, "RxOversizePkts" },

	{ 4, 0x7c, "RxJabbers" },

	{ 4, 0x80, "RxAlignmentErrors" },

	{ 4, 0x84, "RxFCSErrors" },

	{ 8, 0x88, "RxGoodOctets" },

	{ 4, 0x90, "RxDropPkts" },

	{ 4, 0x94, "RxUnicastPkts" },

	{ 4, 0x98, "RxMulticastPkts" },

	{ 4, 0x9c, "RxBroadcastPkts" },

	{ 4, 0xa0, "RxSAChanges" },

	{ 4, 0xa4, "RxFragments" },

	{ 4, 0xa8, "RxJumboPkt" },

	{ 4, 0xac, "RxSymblErr" },

	{ 4, 0xb0, "InRangeErrCount" },

	{ 4, 0xb4, "OutRangeErrCount" },

	{ 4, 0xb8, "EEELpiEvent" },

	{ 4, 0xbc, "EEELpiDuration" },

	{ 4, 0xc0, "RxDiscard" },

	{ 4, 0xc8, "TxQPKTQ6" },

	{ 4, 0xcc, "TxQPKTQ7" },

	{ 4, 0xd0, "TxPkts64Octets" },

	{ 4, 0xd4, "TxPkts65to127Octets" },

	{ 4, 0xd8, "TxPkts128to255Octets" },

	{ 4, 0xdc, "TxPkts256to511Ocets" },

	{ 4, 0xe0, "TxPkts512to1023Ocets" },

	{ 4, 0xe4, "TxPkts1024toMaxPktOcets" },

};



#define B53_MIBS_58XX_SIZE	ARRAY_SIZE(b53_mibs_58xx)



static int b53_do_vlan_op(struct b53_device *dev, u8 op)

{

	unsigned int i;
@@ -635,6 +694,8 @@ static const struct b53_mib_desc *b53_get_mib(struct b53_device *dev) 
		return b53_mibs_65;

	else if (is63xx(dev))

		return b53_mibs_63xx;

	else if (is58xx(dev))

		return b53_mibs_58xx;

	else

		return b53_mibs;

}
@@ -645,6 +706,8 @@ static unsigned int b53_get_mib_size(struct b53_device *dev) 
		return B53_MIBS_65_SIZE;

	else if (is63xx(dev))

		return B53_MIBS_63XX_SIZE;

	else if (is58xx(dev))

		return B53_MIBS_58XX_SIZE;

	else

		return B53_MIBS_SIZE;

}
@@ -1252,9 +1315,21 @@ static int b53_br_join(struct dsa_switch *ds, int port, 
		       struct net_device *bridge)

{

	struct b53_device *dev = ds_to_priv(ds);

	s8 cpu_port = ds->dst->cpu_port;

	u16 pvlan, reg;

	unsigned int i;



	/* Make this port leave the all VLANs join since we will have proper

	 * VLAN entries from now on

	 */

	if (is58xx(dev)) {

		b53_read16(dev, B53_VLAN_PAGE, B53_JOIN_ALL_VLAN_EN, &reg);

		reg &= ~BIT(port);

		if ((reg & BIT(cpu_port)) == BIT(cpu_port))

			reg &= ~BIT(cpu_port);

		b53_write16(dev, B53_VLAN_PAGE, B53_JOIN_ALL_VLAN_EN, reg);

	}



	dev->ports[port].bridge_dev = bridge;

	b53_read16(dev, B53_PVLAN_PAGE, B53_PVLAN_PORT_MASK(port), &pvlan);
@@ -1287,6 +1362,7 @@ static void b53_br_leave(struct dsa_switch *ds, int port) 
	struct b53_device *dev = ds_to_priv(ds);

	struct net_device *bridge = dev->ports[port].bridge_dev;

	struct b53_vlan *vl = &dev->vlans[0];

	s8 cpu_port = ds->dst->cpu_port;

	unsigned int i;

	u16 pvlan, reg, pvid;
@@ -1316,11 +1392,20 @@ static void b53_br_leave(struct dsa_switch *ds, int port) 
	else

		pvid = 0;



	/* Make this port join all VLANs without VLAN entries */

	if (is58xx(dev)) {

		b53_read16(dev, B53_VLAN_PAGE, B53_JOIN_ALL_VLAN_EN, &reg);

		reg |= BIT(port);

		if (!(reg & BIT(cpu_port)))

			reg |= BIT(cpu_port);

		b53_write16(dev, B53_VLAN_PAGE, B53_JOIN_ALL_VLAN_EN, reg);

	} else {

		b53_get_vlan_entry(dev, pvid, vl);

		vl->members |= BIT(port) | BIT(dev->cpu_port);

		vl->untag |= BIT(port) | BIT(dev->cpu_port);

		b53_set_vlan_entry(dev, pvid, vl);

	}

}



static void b53_br_set_stp_state(struct dsa_switch *ds, int port,

				 u8 state)
@@ -1598,11 +1683,22 @@ static const struct b53_chip_data b53_switch_chips[] = { 
		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,

		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,

	},

	{

		.chip_id = BCM7445_DEVICE_ID,

		.dev_name = "BCM7445",

		.vlans	= 4096,

		.enabled_ports = 0x1ff,

		.arl_entries = 4,

		.cpu_port = B53_CPU_PORT,

		.vta_regs = B53_VTA_REGS,

		.duplex_reg = B53_DUPLEX_STAT_GE,

		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,

		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,

	},

};



static int b53_switch_init(struct b53_device *dev)

{

	struct dsa_switch *ds = dev->ds;

	unsigned int i;

	int ret;
@@ -1618,7 +1714,6 @@ static int b53_switch_init(struct b53_device *dev) 
			dev->vta_regs[1] = chip->vta_regs[1];

			dev->vta_regs[2] = chip->vta_regs[2];

			dev->jumbo_pm_reg = chip->jumbo_pm_reg;

			ds->ops = &b53_switch_ops;

			dev->cpu_port = chip->cpu_port;

			dev->num_vlans = chip->vlans;

			dev->num_arl_entries = chip->arl_entries;
@@ -1706,6 +1801,7 @@ struct b53_device *b53_switch_alloc(struct device *base, 
	dev->ds = ds;

	dev->priv = priv;

	dev->ops = ops;

	ds->ops = &b53_switch_ops;

	mutex_init(&dev->reg_mutex);

	mutex_init(&dev->stats_mutex);

drivers/net/dsa/b53/b53_priv.h

+7 −0
Original line number Diff line number Diff line
@@ -60,6 +60,7 @@ enum { 
	BCM53018_DEVICE_ID = 0x53018,

	BCM53019_DEVICE_ID = 0x53019,

	BCM58XX_DEVICE_ID = 0x5800,

	BCM7445_DEVICE_ID = 0x7445,

};



#define B53_N_PORTS	9
@@ -174,6 +175,12 @@ static inline int is5301x(struct b53_device *dev) 
		dev->chip_id == BCM53019_DEVICE_ID;

}



static inline int is58xx(struct b53_device *dev)

{

	return dev->chip_id == BCM58XX_DEVICE_ID ||

		dev->chip_id == BCM7445_DEVICE_ID;

}



#define B53_CPU_PORT_25	5

#define B53_CPU_PORT	8

drivers/net/dsa/b53/b53_regs.h

+3 −0
Original line number Diff line number Diff line
@@ -309,6 +309,9 @@ 
/* Port VLAN mask (16 bit) IMP port is always 8, also on 5325 & co */

#define B53_PVLAN_PORT_MASK(i)		((i) * 2)



/* Join all VLANs register (16 bit) */

#define B53_JOIN_ALL_VLAN_EN		0x50



/*************************************************************************

 * 802.1Q Page Registers

 *************************************************************************/

drivers/net/dsa/bcm_sf2.c

+164 −768

File changed.

Preview size limit exceeded, changes collapsed.

CRA Git | Maintained and supported by SUSTech CRA and CCSE