Commit a25bbc26 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branches 'x86-cpu-for-linus' and 'x86-fpu-for-linus' of... 

Merge branches 'x86-cpu-for-linus' and 'x86-fpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull x86 cpu and fpu updates from Ingo Molnar:

 - math-emu fixes

 - CPUID updates

 - sanity-check RDRAND output to see whether the CPU at least pretends
   to produce random data

 - various unaligned-access across cachelines fixes in preparation of
   hardware level split-lock detection

 - fix MAXSMP constraints to not allow !CPUMASK_OFFSTACK kernels with
   larger than 512 NR_CPUS

 - misc FPU related cleanups

* 'x86-cpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/cpu: Align the x86_capability array to size of unsigned long
  x86/cpu: Align cpu_caps_cleared and cpu_caps_set to unsigned long
  x86/umip: Make the comments vendor-agnostic
  x86/Kconfig: Rename UMIP config parameter
  x86/Kconfig: Enforce limit of 512 CPUs with MAXSMP and no CPUMASK_OFFSTACK
  x86/cpufeatures: Add feature bit RDPRU on AMD
  x86/math-emu: Limit MATH_EMULATION to 486SX compatibles
  x86/math-emu: Check __copy_from_user() result
  x86/rdrand: Sanity-check RDRAND output

* 'x86-fpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/fpu: Use XFEATURE_FP/SSE enum values instead of hardcoded numbers
  x86/fpu: Shrink space allocated for xstate_comp_offsets
  x86/fpu: Update stale variable name in comment
parents 85fbf15b db8c33f8 446e693c

arch/x86/Kconfig

+11 −11
Original line number Diff line number Diff line
@@ -970,8 +970,8 @@ config NR_CPUS_RANGE_END 
config NR_CPUS_RANGE_END

	int

	depends on X86_64

	default 8192 if  SMP && ( MAXSMP ||  CPUMASK_OFFSTACK)

	default  512 if  SMP && (!MAXSMP && !CPUMASK_OFFSTACK)

	default 8192 if  SMP && CPUMASK_OFFSTACK

	default  512 if  SMP && !CPUMASK_OFFSTACK

	default    1 if !SMP



config NR_CPUS_DEFAULT
@@ -1721,7 +1721,7 @@ config X86_RESERVE_LOW 
config MATH_EMULATION

	bool

	depends on MODIFY_LDT_SYSCALL

	prompt "Math emulation" if X86_32

	prompt "Math emulation" if X86_32 && (M486SX || MELAN)

	---help---

	  Linux can emulate a math coprocessor (used for floating point

	  operations) if you don't have one. 486DX and Pentium processors have
@@ -1850,16 +1850,16 @@ config X86_SMAP 


	  If unsure, say Y.



config X86_INTEL_UMIP

config X86_UMIP

	def_bool y

	depends on CPU_SUP_INTEL

	prompt "Intel User Mode Instruction Prevention" if EXPERT

	depends on CPU_SUP_INTEL || CPU_SUP_AMD

	prompt "User Mode Instruction Prevention" if EXPERT

	---help---

	  The User Mode Instruction Prevention (UMIP) is a security

	  feature in newer Intel processors. If enabled, a general

	  protection fault is issued if the SGDT, SLDT, SIDT, SMSW

	  or STR instructions are executed in user mode. These instructions

	  unnecessarily expose information about the hardware state.

	  User Mode Instruction Prevention (UMIP) is a security feature in

	  some x86 processors. If enabled, a general protection fault is

	  issued if the SGDT, SLDT, SIDT, SMSW or STR instructions are

	  executed in user mode. These instructions unnecessarily expose

	  information about the hardware state.



	  The vast majority of applications do not use these instructions.

	  For the very few that do, software emulation is provided in

arch/x86/Kconfig.cpu

+16 −9
Original line number Diff line number Diff line
@@ -50,12 +50,19 @@ choice 
	  See each option's help text for additional details. If you don't know

	  what to do, choose "486".



config M486SX

	bool "486SX"

	depends on X86_32

	---help---

	  Select this for an 486-class CPU without an FPU such as

	  AMD/Cyrix/IBM/Intel SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5S.



config M486

	bool "486"

	bool "486DX"

	depends on X86_32

	---help---

	  Select this for an 486-class CPU such as AMD/Cyrix/IBM/Intel

	  486DX/DX2/DX4 or SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or U5S.

	  486DX/DX2/DX4 and UMC U5D.



config M586

	bool "586/K5/5x86/6x86/6x86MX"
@@ -312,20 +319,20 @@ config X86_L1_CACHE_SHIFT 
	int

	default "7" if MPENTIUM4 || MPSC

	default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU

	default "4" if MELAN || M486 || MGEODEGX1

	default "4" if MELAN || M486SX || M486 || MGEODEGX1

	default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX



config X86_F00F_BUG

	def_bool y

	depends on M586MMX || M586TSC || M586 || M486

	depends on M586MMX || M586TSC || M586 || M486SX || M486



config X86_INVD_BUG

	def_bool y

	depends on M486

	depends on M486SX || M486



config X86_ALIGNMENT_16

	def_bool y

	depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MELAN || MK6 || M586MMX || M586TSC || M586 || M486 || MVIAC3_2 || MGEODEGX1

	depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MELAN || MK6 || M586MMX || M586TSC || M586 || M486SX || M486 || MVIAC3_2 || MGEODEGX1



config X86_INTEL_USERCOPY

	def_bool y
@@ -378,7 +385,7 @@ config X86_MINIMUM_CPU_FAMILY 


config X86_DEBUGCTLMSR

	def_bool y

	depends on !(MK6 || MWINCHIPC6 || MWINCHIP3D || MCYRIXIII || M586MMX || M586TSC || M586 || M486) && !UML

	depends on !(MK6 || MWINCHIPC6 || MWINCHIP3D || MCYRIXIII || M586MMX || M586TSC || M586 || M486SX || M486) && !UML



menuconfig PROCESSOR_SELECT

	bool "Supported processor vendors" if EXPERT
@@ -402,7 +409,7 @@ config CPU_SUP_INTEL 
config CPU_SUP_CYRIX_32

	default y

	bool "Support Cyrix processors" if PROCESSOR_SELECT

	depends on M486 || M586 || M586TSC || M586MMX || (EXPERT && !64BIT)

	depends on M486SX || M486 || M586 || M586TSC || M586MMX || (EXPERT && !64BIT)

	---help---

	  This enables detection, tunings and quirks for Cyrix processors
@@ -470,7 +477,7 @@ config CPU_SUP_TRANSMETA_32 
config CPU_SUP_UMC_32

	default y

	bool "Support UMC processors" if PROCESSOR_SELECT

	depends on M486 || (EXPERT && !64BIT)

	depends on M486SX || M486 || (EXPERT && !64BIT)

	---help---

	  This enables detection, tunings and quirks for UMC processors

arch/x86/Makefile_32.cpu

+1 −0
Original line number Diff line number Diff line
@@ -10,6 +10,7 @@ else 
tune		= $(call cc-option,-mcpu=$(1),$(2))

endif



cflags-$(CONFIG_M486SX)		+= -march=i486

cflags-$(CONFIG_M486)		+= -march=i486

cflags-$(CONFIG_M586)		+= -march=i586

cflags-$(CONFIG_M586TSC)	+= -march=i586

arch/x86/include/asm/cpufeatures.h

+1 −0
Original line number Diff line number Diff line
@@ -292,6 +292,7 @@ 
#define X86_FEATURE_CLZERO		(13*32+ 0) /* CLZERO instruction */

#define X86_FEATURE_IRPERF		(13*32+ 1) /* Instructions Retired Count */

#define X86_FEATURE_XSAVEERPTR		(13*32+ 2) /* Always save/restore FP error pointers */

#define X86_FEATURE_RDPRU		(13*32+ 4) /* Read processor register at user level */

#define X86_FEATURE_WBNOINVD		(13*32+ 9) /* WBNOINVD instruction */

#define X86_FEATURE_AMD_IBPB		(13*32+12) /* "" Indirect Branch Prediction Barrier */

#define X86_FEATURE_AMD_IBRS		(13*32+14) /* "" Indirect Branch Restricted Speculation */

arch/x86/include/asm/disabled-features.h

+1 −1
Original line number Diff line number Diff line
@@ -22,7 +22,7 @@ 
# define DISABLE_SMAP	(1<<(X86_FEATURE_SMAP & 31))

#endif



#ifdef CONFIG_X86_INTEL_UMIP

#ifdef CONFIG_X86_UMIP

# define DISABLE_UMIP	0

#else

# define DISABLE_UMIP	(1<<(X86_FEATURE_UMIP & 31))

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