Commit a24ceab4 authored Oct 04, 2006 by Eric W. Biederman Committed by Linus Torvalds Oct 04, 2006

[PATCH] genirq: irq: convert the move_irq flag from a 32bit word to a single bit



The primary aim of this patchset is to remove maintenances problems caused by
the irq infrastructure.  The two big issues I address are an artificially
small cap on the number of irqs, and that MSI assumes vector == irq.  My
primary focus is on x86_64 but I have touched other architectures where
necessary to keep them from breaking.

- To increase the number of irqs I modify the code to look at the (cpu,
  vector) pair instead of just looking at the vector.

  With a large number of irqs available systems with a large irq count no
  longer need to compress their irq numbers to fit.  Removing a lot of brittle
  special cases.

  For acpi guys the result is that irq == gsi.

- Addressing the fact that MSI assumes irq == vector takes a few more
  patches.  But suffice it to say when I am done none of the generic irq code
  even knows what a vector is.

In quick testing on a large Unisys x86_64 machine we stumbled over at least
one driver that assumed that NR_IRQS could always fit into an 8 bit number.
This driver is clearly buggy today.  But this has become a class of bugs that
it is now much easier to hit.

This patch:

This is a minor space optimization.  In practice I don't think this has any
affect because of our alignment constraints and the other fields but there is
not point in chewing up an uncessary word and since we already read the flag
field this should improve the cache hit ratio of the irq handler.

Signed-off-by: Eric W. Biederman <ebiederm@xmission.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Rajesh Shah <rajesh.shah@intel.com>
Cc: Andi Kleen <ak@muc.de>
Cc: "Protasevich, Natalie" <Natalie.Protasevich@UNISYS.com>
Cc: "Luck, Tony" <tony.luck@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

parent f5b9ed7a

include/linux/irq.h

+1 −2

Original line number	Diff line number	Diff line
		@@ -59,6 +59,7 @@
		#define IRQ_NOAUTOEN 0x08000000 /* IRQ will not be enabled on request irq */
		#define IRQ_DELAYED_DISABLE 0x10000000 /* IRQ disable (masking) happens delayed. */
		#define IRQ_WAKEUP 0x20000000 /* IRQ triggers system wakeup */
		#define IRQ_MOVE_PENDING 0x40000000 /* need to re-target IRQ destination */

		struct proc_dir_entry;

		@@ -132,7 +133,6 @@ struct irq_chip {
		* @affinity: IRQ affinity on SMP
		* @cpu: cpu index useful for balancing
		* @pending_mask: pending rebalanced interrupts
		* @move_irq: need to re-target IRQ destination
		* @dir: /proc/irq/ procfs entry
		* @affinity_entry: /proc/irq/smp_affinity procfs entry on SMP
		*
		@@ -159,7 +159,6 @@ struct irq_desc {
		#endif
		#if defined(CONFIG_GENERIC_PENDING_IRQ) \|\| defined(CONFIG_IRQBALANCE)
		cpumask_t pending_mask;
		unsigned int move_irq; /* need to re-target IRQ dest */
		#endif
		#ifdef CONFIG_PROC_FS
		struct proc_dir_entry *dir;

kernel/irq/migration.c

+3 −3

Original line number	Diff line number	Diff line
		@@ -7,7 +7,7 @@ void set_pending_irq(unsigned int irq, cpumask_t mask)
		unsigned long flags;

		spin_lock_irqsave(&desc->lock, flags);
		desc->move_irq = 1;
		desc->status \|= IRQ_MOVE_PENDING;
		irq_desc[irq].pending_mask = mask;
		spin_unlock_irqrestore(&desc->lock, flags);
		}
		@@ -17,7 +17,7 @@ void move_native_irq(int irq)
		struct irq_desc *desc = irq_desc + irq;
		cpumask_t tmp;

		if (likely(!desc->move_irq))
		if (likely(!(desc->status & IRQ_MOVE_PENDING)))
		return;

		/*
		@@ -28,7 +28,7 @@ void move_native_irq(int irq)
		return;
		}

		desc->move_irq = 0;
		desc->status &= ~IRQ_MOVE_PENDING;

		if (unlikely(cpus_empty(irq_desc[irq].pending_mask)))
		return;

Admin message